IC BLOCK DIAGRAM & DESCRIPTION
P
No. PIN NAME
31
SMP2
32 SMPI
33 LRCLK
34 SMP
35
DFOUT
36
DACLK
37
DFIN
38
LRSY
39 CK2
40 ROM OUT
41
C2FCLK
4==
42
G2F
43 DOUT
44
SBSY
E
45 EFLG
46
Pw
47
SFSY
48
SBCK
49 FSX
1/0/
FUNCTION
01
0
0
Output of signal to DAC, S[gnal of Latch & L 1
0
R selecl, Stgnal for Samphng Hold.
o (DAC: Dlgilal 10 Analog Converter)
o
0
For TEST. Normal hn]c IS non conneclmr.
Output of signal 10 DAC, Signal of Lalch & L I
o R select, S[gnal for Sampling Hold.
For oulput of signal that Comply with CD-ROM.
O \ O~JtpUtof DIGITAL OUT
O I Synchronlang signal of SUb-COde block.
o
For correction monrtor of Cl, C2, single,
double.
o SFSY is Synchromzlng signal of sub-code
o frame. Eighth clock send to SBCK then read
I
out the sub-code of P, Q, R, S, T, U, V, & W.
o Outp(Jt of Synchronlzmg signal (7.35KHz)
IC103 BA6398FP (Pickup & Motor Driver)
No. PIN NAME 1/0
FUNCTION
50
WRQ o
Data sub-code Q pass the CRC
check then
WRQ
do “H”. It detect at external, Data read
51
FlwJc I
52 SQOUT o
OU[
from SQOUT by send Me CQCK. RWC
53
COIN
I
set the “H” by Mcro Processor then
It
k?t
54
CQCK I
command by send w!th Synchronizing CQCK
command data.
55
RES I
Turn rm the Power
S\Jpply lime : Once “L”
56
M/L
Data of SQOUT want al the
LSB llrst hrne : M
I
/ L
SC{ the “L”.
57
LASER
o
This output can control at .Serial cOfllrOl from
Micro Processor
58
16M
o 16M Output (16.9344MHz)
59
4M
o
4M Output (4.2336MHz)
60 CONT o
This output can control at Swlal Control from
Micro Processor
61
TEST5 I
For TEST. Normal tlrnc IS non connection.
62
Cs
This terrnmal “L”: LC7861 KE m .:[ivc. CIIIP
I
select Terminal. (Internal Rcsls[or : Pull Down)
63
XIN
I
Connection Tcrmmal of crystal oscdlatlon
64
XOUT o
(16.9344 MHz)
CH4-
CHL-
CHG-
CH4-
BIAS
GND OUT A
cH3-
CH3-
CH3-
cH3-
OUT B IN A rN B IN
Vcc
‘/Cc
IN B
IN A
OUT E OUT A
1:(!)
rti-)
CH1- CHl - CHl -
CHl - TR-B vREG MUTE
GNO
CH2-
CH2- CH2- CH2-
GND
OUT A OLJT B
IN A
OP-OU1
IN B
OUT
IN B
IN A
OUT B OUT A
T S D ; THERMAL SHUT DOWN
D. BUF, DRIVE BUFFER
No. PIN NAME 1/0 FUNCTION No. PIN NAME 1/0
FUNCTION
1
CH1-OUT A
o
Driver CH1 Negative Output
15
OP IN (-) I Ncgatve Irrput of Opcrat!onal Ampiifcr
2 CHI-OUT B
o
Driver CH1 Posll(ve Output
16
OP IN (-)
I Prmtwe Input of Oprxatlonal Arnpllflcr
3
CH1-IN A I
Driver CHI Inpu[
17 CH3-OUT A
o
Driver CH3 Negatlvc Output
4
CH1-IN B I
Driver CH1 Input for Gain Adjust 18 CH3-OUT B
o
Driver CH3 Posltve O\JIp[J[
5
Tr-B I
Connect for Base of External Transistor
19
CH3-IN A
I Drvcr CH3 Input
6
Vref
OUT o
Output for Constant Voltage (Connecl for
20 CH3-IN B I
Drlvcr CH3 Input for Gain Adlust
Collector of External Transistor 21
Vcc Power source
7 MUTE I Mute Control 22
Vcc Power source
8 GND - Ground (Earth)
23 BIAS IN I Input
for Bias Amplrkr
9 CH2-IN B
I
Driver CH2 Input for Gain AdJust
24 CH4-IN B I
Driver CH4 Inp[it for Gain Adjust
10 CH2-IN A I
Driver CH2 Input 25 CH4-IN A I
Dnvcr CH4 Input
11 CH2-OUT B o Driver CH2 Pos!tive Output 26 CH4-OUT B o
Driver CH4
PoslWe Ou[puI
12 CH2-OUT A
o Driver CH2 Negatwe Output 27 CH4-OUT A o
Dnvcr CH4 Negatlvc Output
13
GND Sub Stra(ght Ground (Earlh)
28 GND
14
OP OUT
S(lb Straght Grcwnd (Eartl])
o Output of Operational Amphfer
-17-