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Sharp LC-32LD145K - Page 32

Sharp LC-32LD145K
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32
LC-39LD145
LC-32LD145
Supports alpha blending for OSD on video plane
Dithering processing for flat panel display
Frame rate conversion
Supports FHD panel and VGA dot-to-dot
Supports PIP/POP, (dual de-interlace, one HD and one SD)
OD (option)
Supports 60Hz Full-HD and WXGA panel over drive
TCON (option)
Flexible timing control with programmable timing
Horizontal timing control
Vertical timing control D Multi-line timing control
Multi-frame timing control
Supports gate power modulation timing
Supports command-based timing
Supports POL inversion every 30 seconds
Supports 1/2/4/8 frame inversion, 1-line inversion, 2-line inversion, and could up to 255line dot inversion
Local Dimming
Block division: up to 800 total blocks, up to 100 horizontal blocks
Supports 50K ~ 50M SPI clock rate
LVDS
D Supports 6/8/10-bit one-link, 6/8/10-bit dual-link LVDS transmitter
D Built-in spread spectrum for EMI performance
D Programmable panel timing output
Mini-LVDS
Dual port 8-bit 6 pairs mini-LVDS output
EPI
6 port, 8/10-bit EPI
CVBS In
On-chip 54 MHz 10-bit video ADC
Supports PAL (B,G,D,H,M,N,I,Nc), NTSC, NTSC-4.43, SECAM
NTSC/PAL supports 3D/2D comb filter
Built-in motion-adaptive 3
Noise Reduction
VBI data slicer for CC/TT decoding
Supports 1 S-Video D Supports 2-channel CVBS
Supports SCART connector
VGA In
Supports VGA input up to UXGA 162 MHz
Supports full VESA standards

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