Technical data of CPU 31xC
6.6 Technical data of the integrated I/O
CPU 31xC and CPU 31x, Technical data
Manual, Edition 08/2004, A5E00105475-05
6-45
6.6.4 Interrupts
Interrupt inputs
All digital inputs of the on-board I/O of CPUs 31xC can be used as interrupt inputs.
You can specify interrupt behavior for each individual input in your parameter declaration.
Options are:
• no interrupt
• Interrupt at the positive edge
• Interrupt at the negative edge
• Interrupt at the positive and negative edge
Note
Every channel will hold one event if the rate of incoming interrupts exceeds the handling
capacity of OB40. Further events (interrupts) will be lost, without diagnostics or explicit
message.
Start information for OB40
The table below shows the relevant temporary variables (TEMP) of OB40 for the interrupt
inputs of 31xC CPUs. A description of process interrupt OB 40 is found in the Reference
Manual
System and Standard Functions
.
Table 6-11 Start information for OB40, relating to the interrupt inputs of the integrated I/O
Byte Variables Data type Description
6/7 OB40_MDL_ADDR WORD B#16#7C Address of the interrupt-
triggering module (here: default
addresses of the digital inputs)
8 on OB40_POINT_ADDR DWORD see the figure
below
Displaying the interrupt-
triggering integrated inputs
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