Technical Data
12.1 General Device Data 1407
12.2 Protection Interface and Protection Topology 1417
12.3 Date and Time Synchronization 1419
12.4 Analog-Units Function Group 1420
12.5 Overcurrent Protection, Phases 1421
12.6 Voltage-Dependent Overcurrent Protection, Phases 1433
12.7 Overcurrent Protection, Ground 1436
12.8 Directional Overcurrent Protection, Phases 1446
12.9 Directional Overcurrent Protection, Ground 1452
12.10 Inrush-Current Detection 1462
12.11 Arc Protection 1463
12.12 Instantaneous High-Current Tripping 1464
12.13 Instantaneous Tripping at Switch onto Fault 1465
12.14 Overcurrent Protection, 1-Phase 1466
12.15 Overcurrent Protection, 1-Phase (Fast Stage) 1471
12.16 Non-Directional Intermittent Ground-Fault Protection 1472
12.17 Directional Intermittent Ground-Fault Protection 1474
12.18 Sensitive Ground-Fault Detection 1476
12.19 Undercurrent Protection 1486
12.20 Negative-Sequence Protection 1488
12.21 Directional Negative-Sequence Protection with Definite-Time Delay 1492
12.22 Thermal Overload Protection, 3-Phase – Advanced 1494
12.23 Thermal Overload Protection, User-Defined Characteristic Curve 1497
12.24 Unbalanced-Load Protection 1498
12.25 Current-Unbalance Protection for Capacitors, 3-Phase 1500
12.26 Current-Unbalance Protection for Capacitors, 1-Phase 1502
12.27 Voltage-Differential Protection for Capacitors 1504
12.28 Differential Protection for Capacitor Banks 1505
12.29 Overvoltage Protection with 3-Phase Voltage 1507
12.30 Overvoltage Protection with Zero-Sequence Voltage/Residual Voltage 1509
12.31 Overvoltage Protection with Positive-Sequence Voltage 1511
12.32 Overvoltage Protection with Negative-Sequence Voltage 1512
12.33 Overvoltage Protection with Any Voltage 1513
12.34 Peak Overvoltage Protection for Capacitors 1515
12
SIPROTEC 5, Overcurrent Protection, Manual 1405
C53000-G5040-C017-8, Edition 07.2017
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