6 Addressing
6.1 Slot Numbering . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 - 1
6.2 Digital Modules . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 - 4
6.3 Analog Modules . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 - 5
6.4 Combined Input Modules and Output Modules . . . . . . . . . . . . . . . 6 - 6
6.4.1 Output Modules with Error Diagnostics . . . . . . . . . . . . . . . . . . . . 6 - 6
6.4.2 Digital Input/Output Module, 16 Inputs, 16 Outputs, 24 V DC
for All CPUs Version 8MA02 and Higher and
for CPU 102, Version 8MA01, Revision 5 and Higher . . . . . . . . . . 6 - 7
6.4.3 Function Modules . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 - 7
6.5 The Structure of Process Image Input and Output Tables . . . . . . . 6 - 8
6.5.1 Accessing the Process Image Input Table (PII) . . . . . . . . . . . . . . . 6 - 10
6.5.2 Accessing the Process Image Output Table (PIQ) . . . . . . . . . . . . . 6 - 11
6.6 Interrupt Process Images and Time-Controlled Program
Processing in OB13 for CPU 103, Version 8MA02 and Higher . . . . 6 - 12
6.6.1 Accessing the Interrupt PII . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 - 12
6.6.2 Accessing the Interrupt PIQ . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 - 14
6.7 RAM Address Assignments . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 - 15
EWA 4NEB 812 6120-02
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