Siemens S7-1200 - Timers, Counters and Code Blocks Supported by CPU 1211 C

Technical specifications
A.2 CPU 1211C
S7-1200 Programmable controller
838 System Manual, 03/2014, A5E02486680-AG
Technical data
Description
Time delay interrupts
4 total with 1 ms resolution
Cyclic interrupts
4 total with 1 ms resolution
Edge interrupts
6 rising and 6 falling (10 and 10 with optional signal board)
Memory card
SIMATIC Memory Card (optional)
Real time clock accuracy
+/- 60 seconds/month
Real time clock retention time
20 days typ./12 days min. at 40 °C (maintenance-free Super Capacitor)
1
The slower speed is applicable when the HSC is configured for quadrature mode of operation.
2
For CPU models with relay outputs, you must install a digital signal board (SB) to use the pulse outputs.
Table A- 11 Performance
Type of instruction
Execution speed
Boolean
0.08 μs/instruction
Move Word
1.7 μs/instruction
Real math
2.3 μs/instruction
A.2.2
Timers, counters and code blocks supported by CPU 1211C
Table A- 12 Blocks, timers and counters supported by CPU 1211C
Element
Description
Blocks
Type
OB, FB, FC, DB
Size
30 Kbytes
Quantity
Up to 1024 blocks total (OBs + FBs + FCs + DBs)
Address range for FBs, FCs,
and DBs
FB and FC: 1 to 65535 (such as FB 1 to FB 65535)
DB: 1 to 59999
Nesting depth 16 from the program cycle or startup OB
6 from any interrupt event OB
Monitoring
Status of 2 code blocks can be monitored simultaneously
OBs
Program cycle
Multiple
Startup
Multiple
Time-delay interrupt
4 (1 per event)
Cyclic interrupts
4 (1 per event)
Hardware interrupts
50 (1 per event)
Time error interrupts
1
Diagnostic error interrupts
1
Pull or plug of modules
1
Rack or station failure
1
Time of day
Multiple
Status
1