Siemens S7-1200 - Page 883

Technical specifications
A.6 CPU 1217C
S7-1200 Programmable controller
System Manual, 03/2014, A5E02486680-AG
883
Technical data
CPU 1217C DC/DC/DC
HSC clock input rates (max.)
(Logic 1 Level = 15 to 26 VDC)
100/80 kHz (Ia.0 to Ia.5)
30/20 kHz (Ia.6 to Ib.1)
Type: Differential input
Ib.2 to Ib.5 (.2+ .2- to .5+ .5-)
Common mode voltage range
-7 V to +12 V, 1 second, 3 VRMS continuous (RS485 characteristics)
Termination and bias 390 Ω to 2M on Ib'-', 390 Ω to +5 V on Ib'-', (biased OFF when T/B open-circuit)
220 Ω between Ib'+' and Ib'-'
Receiver input impedance
100 Ω including bias and termination
Differential receiver
threshold/sensitivity
+/- 0.2 V min., 60 mV typical hysteresis
Isolation (field side to logic)
500 VAC for 1 minute (functional isolation)
Isolation groups
1
Filter times us settings: 0.1, 0.2, 0.4, 0.8, 1.6, 3.2, 6.4, 10.0, 12.8, 20.0
ms settings: 0.05, 0.1, 0.2, 0.4, 0.8, 1.6, 3.2, 6.4, 10.0, 12.8, 20.0
HSC clock input rates (max.) Single phase: 1 MHz (Ib.2 to Ib.5)
Quadrature phase: 1 MHz (Ib.2 to Ib.5)
Differential input
channel-to-channel skew
40 ns max.
General specifications (all digital
inputs)
Number of inputs on simultaneously 5 Sink/source inputs (no adjacent points) and 4 differential inputs at 60 °C
horizontal or 50 °C vertical
14 at 55 °C horizontal or 45 °C vertical
Cable length (meters) 500 m shielded, 300 m unshielded
50 m shielded for HSC inputs (sink/source)
50 m shielded, twisted pair for all differential inputs
Table A- 95 Digital outputs
Technical data
CPU 1217C DC/DC/DC
Number of outputs 10 total
6: Solid state - MOSFET (sourcing)
4: 1.5 V differential
Type: Solid state - MOSFET
(sourcing output)
Qa.4 to Qb.1
Voltage range
20.4 to 28.8 VDC
Logic 1 signal at max. current
20 VDC min.
Logic 0 signal with 10 KΩ load
0.1 VDC max.
Current (max.)
0.5 A
Lamp load
5 W
ON state resistance
0.6 Ω max.
Leakage current per point
10 μA max.
Surge current
8 A for 100 ms max.