Siemens S7-300 - Page 144

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S7-300 Automation System, Hardware and Installation: CPU 312IFM - 318-2 DP
9-32 A5E00203919-01
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Note the following rules when working with intermediate memory:
• Assignment of address areas:
– Input data of DP slaves are DOZD\V output data of the DP master
– Output data of DP slaves are DOZD\V input data of the DP master
• The user can define these addresses. In the user program, access data with
load/transfer instructions or with SFC 14 and 15. You can also specify
addresses from the input/output process image (refer to Chapter $GGUHVVLQJ
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• The lowest address of specific address areas is their respective area start
address.
• The length, unit and consistency of the address areas for DP master and DP
slave must be identical.
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Assign transfer memory addresses taken from the DP address area of
CPU 31x-2 DP.
Addresses assigned to transfer memory cannot be assigned again to I/O
modules of CPU 31x-2 DP. When using consistent data areas in transfer
memory, note the section on &RQVLVWHQW'DWD in Chapter $GGUHVVLQJ.
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When exchanging consistent data with IM 308-C operating as DP master and
CPU 31x-2 DP as DP slave, note that:
You must program FB192 in IM 308-C to enable exchange of consistent data
between a DP master and the DP slave. FB192 reads or outputs CPU 31x-2 DP
data only in a single continuous block.
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Bus parameters of an AG S5-95 operated as DP master must also be set in
CPU 31x-2 DP operating as DP slave.
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The DP slave CPU goes into STOP mode: Data in CPU intermediate memory are
overwritten with "0". That is, the DP master reads "0".
The DP master goes into STOP mode: Actual data in CPU intermediate memory is
maintained and can still be read by the CPU.