Blocks of the library
5.2 Explanation of SIMATIC STEP 7 blocks
SITOP PSU8600 Firmware V1.3: Faceplates and Communication Blocks V2.3 for SIMATIC STEP 7 V5.5
24 Function Manual, 11.2017, A5E37764016-06-76
Table 5- 8
Start address of the buffer module.
Int Number of the buffer module that is plugged.
Starting on the left with “1”. (Maximum of 2 can
be plugged)
Table 5- 9
UDT_PSU8600_Data_V2 Data block for global data exchange. DB must
follow the UDT structure.
Table 5- 10
Operating state of the buffer module.