Sony CDX-C4750 - Page 30

– 41 – – 42 –
• IC Block Diagrams
IC1 CXD2507AQ
IC3 BA6796FP-T1
XLON
SPOD
SPOC
SPOB SPOA
CLKO
VDD
CNIN
SEIN
CLOK
XLAT
XLTO
DATO
52
53
5455
5657
58596061
62
63
64
51
SERVO AUTO
SEQUENCER
33
34
35
36
37
38
39
40
41
42
43
45
46
47
48
49
50
44
DATA
XRST
SENS
MUTE
SQCK
SQSO
EXCK
SBSO
SCOR
VSS
WFCK
EMPH
DOUT
C4M
FSTT
XTSL
XTAO
XTAI
MNTO
20 21 22 23 24 25 26 27 29
30
31 3228
LRCK
PCMD
BCLK
GTOP
XUGF
XPCK
VDD
GFS
RFCK
C2PO
XROF
MNT3
MNT1
1
2
3
4
5
6
7
8
9
10
11
12
16
17
18
19
13
14
15
FOK
MON
MDP
MDS
LOCK
TEST
FILO
FILI
PCO
VSS
AVSS
CLTV
AVDD
RF
BIAS
ASYI
ASYO
ASYE
WDCK
5
14
CPU
INTERFACE
SUB CODE
PROCESSOR
DIGITAL
CLV
EFM
DEMODULATOR
DIGITAL
PLL
ASYMMETRY
CORRECTOR
5
D/A
INTERFACE
ERROR
CORRECTOR
3
6
3
16K
RAM
DIGITAL
OUT
CLOCK
GENERATOR
4
1
23 4
5
6
78
9
10
11
12 13
14
OPOUT
CH4-IN
CH4
CTL1
CTL2
FWD
REV
TRAY
GND
CH3 –
CH5 –
COM
CH4 +
CH3 +
CH3-IN
CH3
VREF
CH2
CH2-IN
VCC
VCC
CH1 –
CH2 –
CH1-IN
OP IN –
CH1
CH1 +
OP IN +
CH2 +
DRIVE
BUFFER
DRIVE
BUFFER
DRIVE
BUFFER
DRIVE
BUFFER
DRIVE
BUFFER
DRIVE
BUFFER
DRIVE
BUFFER
DRIVE
BUFFER
DRIVE
BUFFER
LEVEL
SHIFT
LEVEL
SHIFT
LEVEL
SHIFT
LEVEL
SHIFT
THERMAL
SHUT
DOWN
15
161718
1920
21
22
23
2425
26
27
28
LOGIC
CTL1 CTL2 FWD REV
V/I
IC2 CXA1782BQ
36 35 34
33
32
31
30 29 28 27 26 25
24
23
22
21
20
19
18
17
16
15
14
13
12
11
10
987
6
5
43
2
1
37
38
39
40
41
42
43
44
45
46
47
48
PHD 2 PHD 1
PHD
LD
RF O
RF I
CP CB CC1 CC2 FOK
SENS
C.OUT
XRST
DATA
XLT
CLK
VCC
ISET
SL O
SL M
SL P
TA O
TA M
FSET
TG2
TGU
SRCH
FE O
FLB
FGD
FDFCT
FE M
FEI
FEO
FE BIAS
F
E
EI
VEE
TED
LPFI
TEI
ATSC
TZC
TDFCT
VC
APC
LEVEL S
FOK
MIRR
RF IV AMP1
RF IV AMP2
FE AMP
TTL
IIL
FZC COMP
DFCT
IIL
TTL
IIL DATA REGISTER
INPUT SHIFT REGISTER
ADDRESS DECODER
OUTPUT DECODER
TTL
IIL
TOG1-3
BAL1-3
FS1-4 TG1-2 TM1-7 PS1-4
F IV AMP
E IV AMP
BAL1
BAL2
BAL 3
TE AMP
TZC COMP
DFCT
TM1
DFCT
FS4
ATSC
WINDOW COMP
TOG1 TOG2
TOG3
FCS PHASE
COMPENSATION
FS1
F SET
TG2
TM7
TM3
TM4
TM5
TM6
ISET
TRACKING
PHASE
COMPENSATION
HPF COMP
LPF COMP
TG1
FS2
TM2
RF M