Sony DSLR-A100 - Overall Block Diagram

DSLR-A100_L2
3-1
3. BLOCK DIAGRAMS
3-1. OVERALL BLOCK DIAGRAM (1/4) ( ) : Number in parenthesis ( ) indicates the division number of schematic diagram where the component is located.
A : VIDEO SIGNAL
M4, C4, L4,
D4, K4, E4,
J4, F4, H4,
G4, H3, G3
IS-001 BOARD
(SHUTTER)
SHUTTER
UNIT
BUFFER
(1/3)
IC013
CCDOUT_1-BUFF
CCD IMAGER
(1/3)
IC001
2ch AFE
(3/3)
IC002
TIMING GENERATOR,
V DRIVER
(2/3)
IC012
CN001
31
13
14
10
9
8
16 - 27
22, 25, 28
13, 12
33
BUFFER
(1/3)
IC014
H DRIVER
(1/3)
IC005
CCDOUT_2-BUFF
H1F_ABC
H2F_ABC
31
52
D12
C1
M1
D13
23, 26, 27
9, 8
15, 1
H1
H2
5, 6
63, 60, 57
13, 12
H DRIVER
(1/3)
IC015
H1F_DEF
H2F_DEF
62, 59, 58
9, 8
15, 15, 6
30, 55
BUFFER
(1/3)
IC016
LH1_1LH1F_1
24
29 L14
BUFFER
(1/3)
IC017
LH1_2LH1F_2
24
56
43
D14
BUFFER
(1/3)
VSUB CONTROL
Q006, 007
IC006
RGRG1, RG2
24
BUFFER
(3/3)
IC011
4
2
D11
V1_1, V1_2, V2_1, V2_2,
V3_1, V3_2, V4_1, V4_2
OBCLP_A
G1
L5
OBCLP_B
H1
M4
H1INV
F11
G4
H2INV
F12
H3
CLPDM
F1 J1
H4
TGHDX
N10
P4
TGVDX
F13
N4
AN_SCK
F14
N3
PBLK
B10
N5
AN_SOUT
H12
P3
G12
TGCLK
A14
P7
M3
VSUB
A12
A11
CCDD_A0 - CCDD_A11
M9, C9, L9,
D9, M8, C8,
L8, D8, M6,
C6, L6, D6
4 - 9,
12 - 17
D6, A10,
B6, D9,
C5, C10,
A4, B4
V1_3, V1_4, V2_3, V2_4,
V3_3, V3_4, V4_3, V4_4
36 - 41,
44 - 49
C6, C9,
A5, B5,
D5, B10,
C4, D4
28 - 39
CCDD_B0 - CCDD_B11
42
CSUB CONTROL
Q005
Q013
DUMMY LOAD
SWITCH
CSUB
HDRV_6
05
A13
J4
AN_RSTX
TGHDx
TGVDx
AN_SCK
AN_SOUT
AN_RSTx
H13
K4
6
TGCLK
12
CSTGx
G13
11
CSADx
3
CTHERM
TH001
P14
AM-001 BOARD (1/4)
FP-556 FLEXIBLE BOARD
MAIN CPU
(3/5)
IC301 (1/2)
AF CCD
SHUTTER
DRIVE
Q301
IC604
6
CN121
3
1
CN114
12
4
38
37
18
VOUT
14
98
95
ADT
1C
2C
5
SWX
1C
2C
SWX
1C
2C
SWX
SH1
SH2
XONX
1CMG
1CMG
2CMG
73
8
8
6
CBG
10
100
74
IST
9
5
7
CP
7
99
28
RST
4
3
2
MOD1
5
65
66
MOD2
2
1
13
MOD3
1
63
64
MOD4
VOUT
ADT
CBG
IST
CCDCP
RST
MOD1
MOD2
MOD3
MOD4
CONTROL
BLOCK
OVERALL (2/4)
(PAGE 3-2)
2
OVERALL (2/4)
(PAGE 3-2)
1