Sony RM-E80 - Page 13

3.2.
JC.l
AND JC.2
BOAROS SCHEMATIC DIAGRAM
JC-1 BOARD
3
@
r
PO 760 7HO
-
653
'
2 2
.
È, ;::-
tEg
s-8r25XG
o20,21
DAP2O2K
o14
25C211 2K
IE
s-gl
lrrsErl cl
-
u(
zDs Di I
RO66ES-82
DAP2O2K
c
Tffil
lc@i4l
I
zol zo2
F06
EES82 R06 8ES82
D2?
PHDi
o!, e l@ o6
Î::
DAP202K
PO410Pl
25C2112K uPoa63aBG OT^144EK
swllcHrNo
o6
swtTcHtNô
r*1
HH
Notr:
.
All
resistors
are in ohms, 1/6W
(Chip
resistors:
1/iOW)
unless
otherwise
noted.
kO: 1000s},Mçl:
10O0kQ.
.
All capacitors are in
pF
unless otherwise noted.
pF:
ppF
50V
or less
are
not
indicated except
for
electrolytics
and
tantalums.
.
All
variable
and
adiustable
resistors
have
characreristic
curve
B,
unless otherwise noted.
o
[----l
:
panel
designation.
a
a
a
a
lll:
B+ line.
Voltages
are
dc between
measurement
points
and
ground
unless
otherwise
noted.
Readings
are
taken
wilh a digital
mullimeter
(DClOMçl).
Voltage
variations
may
be
noted
due to
normal
produc-
tion
tolerances.
When
indicârl
ence number,
board
name.
-13-
--z^.-re
/