Sony WALKMAN WMD-DT1 - Page 16

Pin Name lo
RFDT
TST 1
XTII
XT10
Vss
XT2I
XT20
TST2
MTG 1
MTG 2
RP input pin
Test input pin (1). Fixed at “L”
46
47
48
49
Crystal output pin (49.152 MHz)
na Oo Q
zZ i]
Crystal input pin (49.152 MHz)
51
52
53
54
0 [Ato mite monitor ouput in (Wen SSL DL Now] SC
256 xfs output pin
Crystal input pin (22.5792 MHz)
XRAS
XCAS
ie fof
| 56
es neha
em
‘A8~A0
|
a Bs |
2 |
| 73
| 74 |
| 5 |
55
56
57
58
59
70
71
aie
73
74
75
76
7
78
79
ro)
i
Vv
Win
XOE
XWE
DD
TT A
ERMN
ATMT
FSSL
fom
ice
=<
F128
[Note 1] DSPW and DBPW become the PLL lock range switching signal when MTCL is “L” and DMTR is “H”. The following lock
ranges can be set.
DBPW @® Lock Range
— 34-+4%
— 5-+39%
1
When DMTR is “L”, “H” will be output for both.
128Xfs output pin
S|
oO
DSPW©®
[Note 2] When FSSL is “H”, ERMN and ATMT become the input pins for setting the Fs information. The settings are as follows.
ERUN® | _ATUTS
el ee ee)