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General| Number of Channels | 4 |
|---|---|
| Output Voltage | ±5 V |
| Delay Resolution | 5 ps |
| Output Impedance | 50 Ω |
| Power Requirements | 100-240 VAC, 50/60 Hz |
| Trigger Input | TTL |
| Interface | RS-232 |
| Delay Range | 0 to 1000 s |
Procedure for selecting the correct AC line voltage and fuse for the instrument.
Information regarding the use of a three-wire power cord for protective grounding.
Notes on connecting other instruments and avoiding voltage application to outputs.
Specifications for the four independent delay outputs, range, resolution, accuracy, and timebase.
Specifications for the internal rate generator's rate, resolution, accuracy, jitter, and burst mode.
Specifications for external trigger input, including rate, threshold, slope, and impedance.
Specifications for output channels T0, A, B, C, D, AB, CD, including load, risetime, slew rate, and levels.
Specifications for the IEEE488 GPIB interface, including command set and buffer.
Physical dimensions, weight, power consumption, and warranty information.
Commands for instrument initialization and clearing settings.
Commands to retrieve error and instrument status bytes.
Commands for controlling the front panel display and cursor.
Commands for setting and linking delay times for channels.
Commands for configuring output termination, mode, amplitude, offset, and polarity.
Commands for setting trigger mode, rate, level, slope, burst count, and period.
Commands for storing and recalling instrument settings.
Definition of bits within the instrument status byte.
General notes on command syntax, parameter types, and response termination.
Overview of the DG535's capabilities and applications.
Summary of front panel controls including Power, LCD, Menu Keys, and Data Entry.
Description of the keypad and its three modes of operation.
Explanation of the five LEDs indicating trigger status.
Description of the five delay output BNCs and their programming.
Description of the AB, -AB, CD, and -CD pulse outputs.
Functionality of the trigger inhibit input option.
Description of Power Entry Module, IEEE-488 Port, and 10.000 MHz Reference.
Explanation of front panel menu navigation and keypad modes.
Details of the trigger menu options and cursor control.
Specific submenus for Internal, External, Single-Shot, and Burst trigger modes.
Techniques to extend the versatility of DG535 trigger modes.
Procedures for programming delay channels and linking functions.
Configuration of output impedances, amplitudes, offsets, and polarities.
Configuration details for the AB and CD pulse outputs.
Menus for setting GPIB address and viewing data.
Error in time delay between outputs, dependent on timebase.
Drift of the timebase over hours, affected by temperature.
Sources of noise modulating time delay and resulting jitter.
Interaction (pulling) between delay channels A/B and C/D.
How time delay changes with pulse repetition rate.
List of equipment needed for calibration procedures.
General steps for calibration, including recalling factory settings.
Procedure to calibrate the external trigger input offset.
Calibration for the optional 1ppm TCXO time base.
Accessing calibration factors via menu keys.
Procedure to calibrate the amplitude of front panel output drivers.
Procedure to calibrate the offset of front panel output drivers.
Procedure to minimize timing jitter with respect to an external trigger.
Adjusting delay factors to minimize jitter between external trigger and delay output.
Details of the Z-80B microprocessor, firmware, and RAM.
Description of the TMS9914A GPIB controller and interface.
Description of the front panel key pad and status LEDs.
Details of the front panel LCD connector and backlighting.
Description of octal buffers and LSI counter/timer ICs on the top PCB.
Description of octal latches and analog multiplexers on the bottom PCB.
Explanation of ICs used for I/O port decoding.
Description of input ports used for keypad and status bits.
Details of the 12-bit D/A converter and its function.
Description of the 80MHz oscillator, reference sources, and PLL.
Description of the 10 MHz frequency source and clock generation.
How the line trigger is synchronized to the 80 MHz timebase.
Control bits for selecting the internal rate generator mode.
Description of internal and external trigger circuits.
Details of the delay cycle initiation and jitter pulse generation.
Explanation of the four delay channels and their counter configurations.
Description of analog delays controlled by charging capacitors.
Circuit purpose to produce voltage proportional to time between trigger and clock edge.
Reference voltages and sample/hold OTA for jitter compensation.
Generation of a kick pulse to rapidly recharge capacitors.
Description of the T0 digital delay, similar to other channels but not adjustable.
Description of digital delays, referencing channel A's configuration.
Initiation of reset cycle and availability of status bits.
Description of output drivers for each channel.
Control of DC offset voltage for outputs.
Functionality of the 50 ohm load placed on the output.
Description of gate output drivers and their complementary outputs.
Description of the linear power supply and voltage regulators.
Description of the option 02 rear panel outputs.
Specifications for the 100 ps risetime module.
Specifications for the 100 ps falltime module.
Description of the bias tee option.
Overview of fast transition-time modules and their applications.
Guidelines for attaching fast transition-time units.
Configuration for output steps below 2.0 V.
Configuration for output steps up to 3.7 V.
Details on output step amplitude and offset for <2.0V.
Details on output step amplitude and offset for <3.7V.
Configuration for output steps up to 15 V using rear panel outputs.
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