Theory of Operation-2225 Service
The sweep ramp is initiated when Q536 (diagram 4)
is biased off. The GATE signal going to the base of
Q701 from the Sweep Logic circuit turns Q701 off.
The timing capacitors then begin charging at a rate
set by timing resistors
R701, R702, and the position
of the SECIDIV switch
S701. One end of timing
resistor R701 is connected to the wiper of
R721, and
the other end is connected to the input of the Miller
integrator. Due to feedback from the circuit output
through the timing capacitors, the integrator input
voltage at the gate of
Q704A remains fixed and sets
a constant voltage across the timing resistors. This
constant voltage produces a constant charging
current through the timing capacitors, which results
in a linearly increasing voltage ramp at the output of
the Miller Sweep circuit.
When the ramp reaches approximately 12 V, the
Sweep Logic circuitry will initiate the
holdoff period
during which Q701 is turned on and the Sweep
Generator is reset. This
holdoff period is necessary
so that the timing capacitors can be fully discharged
before another sweep starts. Capacitors C704 and
C703 are always in the charging circuit and are used
for high sweep speeds. Capacitors C701 and C702
are used for medium sweep speeds; C701 alone is
used for slow sweep speeds.
The SECIDIV Variable circuitry utilizes an operational
amplifier to maintain a constant reference voltage at
one end of R721 independent of the circuit load. The
voltage applied to the timing resistors varies with the
setting of
R721, the SECIDIV Variable control. A
fixed dc voltage is applied to the noninverting input
of the operational amplifier, and feedback resistors
R717 and R718 establish double that voltage at the
anode of
VR719. Resistor R722 is used to adjust the
reference voltage when in the 0.5 ms to 10
ps
SECIDIV ranges to correct for mismatch between
timing capacitors C701 and
C702.
Sweep
Logic
The purpose of the Sweep Logic circuit (diagram 4)
is to control the sweep start dependent upon the
trigger signal and Trigger MODE setting. It also pro-
vides the signal for Alternate Channel Switching and
Alternate Magnification.
NORM.
When NORM trigger is selected, the circuit is
ready to start the sweep in response to a trigger
signal.
U530B has a LO on the SET, RESET, and D
input. A trigger pulse received at the CLOCK pin of
U530B will clock the LO on the D input to the Q out-
put and enable the sweep to start. The output of the
sweep generator is fed back via W701-3 into the
potential divider R501 and
R502. This divider is
arranged so that when the ramp voltage reaches
approximately 12
V,
U560E is turned on, producing a
LO on the input of inverter
U520A. The signal from
U520B is inverted by U520C to give an overall
OR
function which is fed to the SET input of U530B. This
overrides the CLOCK input and puts a HI on the
Q
output, resetting the sweep. The sweep reset is also
fed to the input of monostable multivibrator
U500B,
which gives a holdoff time dependent upon the
holdoff capacitor selected and the variable holdoff
resistor chain. The holdoff pulse from the mono-
stable maintains the HI on the SET input of U530B
until the end of the holdoff period. At that time the
SET is driven LO, allowing the next trigger pulse to
start the sweep.
P-P
AUTO.
In the P-P AUTO mode, the sweep will
free-run in the absence of a trigger signal. Should
there be more than 50 ms between trigger pulses,
the Auto Baseline circuit, consisting of
U580B,
U520D, U570A, and U570B, will initiate a sweep. The
circuit of
U580B is a 20-Hz clock pulse generator.
The 20-Hz clock signal is passed through Schmitt
trigger
U520D to provide a fast rise time. This is to
ensure that
U570A pin D and U570B pin D switch at
the same time.
With no trigger signal, the first clock pulse from
U580B resets U570A, putting a HI on the D of U570B.
This will then be clocked (giving a LO on
TRIGGERED) when the next 50-ms pulse arrives. If
the end of sweep has occurred and the
holdoff
period has elapsed, then the output of U520C will be
LO. Because TRIGGERED and P-P AUTO are both
LO, the output of
U550D will put a LO on one input of
~550~. As the other input is also LO, the output of
U550B will put a HI on the RESET pin of U530B. That
resets the flip-flop, placing a HI on the base of Q536
that turns it off and forces GATE LO at the collector
of Q536 to initiate a sweep.
If a trigger occurs, the HI on the D pin of
U570A is
passed to the Q of
U570A, to reset U570B, and put a
HI on the
TRlGGERED line. The output of U550B will
then be LO, allowing
U530B to respond to the next
trigger signal. When the TRIGGERED line is HI the
TRIG'DIREADY light is turned on via
U550A.
SINGLE
SWEEP.
When the SGL SWP MODE is
selected, the SINGLE SWEEP line is LO, holding the
D input of
U570A LO. This effectively disables the
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