Texas Instruments 99/4A - Page 6

FIGURE
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LIST OF FIGURES
PAGE 4
DESCRIPTION
System Block Diagram .................... .
Clock Circuitry ............................................................................................................. 14
TNS 9900 Architecture ................................................................. . ....................... 20
TNS 9900 Pin Assignments And Functions .......................................... 21
Nemory Read Cycle Timing ................................................................................... 25
Nemory Write Cycle Timing ................................................................................ 26
Nemory Read Cycle Timing With One Wait State ........................ 27
Nemory Write Cycle Timing With One Wait State ..................... 28
Direct Nemory Access Timing .......................................................................... 29
CRU Interface Timing ............................................................................................... 30
Nemory Selection Logic ............................................................................... . ... 35
RON And RAN Nemory ................................. . ...................... 38
16 to 8 Bit Nultiplexing Circuit ........................................................... 41
Control Signal Generation .................................................................................. 42
CPU Ready Generation ...................................................................................... 43
WE Generation ....................................................................................................................... 44
External -Cpu^Write Timing .................................................................................... 45
External CPU Read Timing ...................................... -46
GRON Read Timing .............................................................................................................. 47
GRON Selection And Ready Logic ................................................................. 52
Ready Timing ............................................................................. . ...................................... 53
TNS 9901 Pin Assignments And Functions .......................................... 57
TNS 9901 I/O Interface Section Block Diagram ............ . ... 60
TNS 9901 Interupt Handling Logic ............................................................ 61
TNS 9901 Programmable System Interface .......................................... 62
TNS 9901 Interval Timer Section .............................................................. 63
VDP Selection Logic .................................................................................. 69
Video Display Processor (VDP) .................................................................... 70
TNS 9918 VDP Block Diagram ............................................................................. 71
TNS 9919 Sound Processor Selection Logic .................... 77
LS 138 ........................................................................................ 110
LS 194 ........................................................................................................................................ Ill
LS 244 ................................... 112
LS 245 ........................................................................................................................................ 113
TIN 9904 Four - Phase Clock Generator Driver ........................ 114
TIN 9904 Four - Phase Clock Generator Driver ........................ 115
LS 373 ........................................................................................................................................ 116
4116 Dynamic RAN ........................................................................................................... 117
NF 4732 RONS ................................................................................................................. 119
6810 RAN .................................................................................................................................. 120
Pin Outs For TNS 9900, U608-6U, And U614-616 ..................... 121
Mainframe Board Lay-Out ...................................................................................... 122
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