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Texas Instruments 99/4A - Page 66

Texas Instruments 99/4A
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TMS
9901
JL,
NL
PROGRAMMABLE
SYSTEMS
INTERFACE
Peripheral
and
Interlace
Circuits
Pin
Descriptions
Table
4
defines
the
TMS
9901
pm
assignments
and
describes
the
function
of
each
pm.
TABLE
4
TMS
9901
AN
ASSIGNMENTS
ANO
FUNCTIONS
SIGNATURE
PIN
I/O
DESCRIPTION
iNYR
EQ
ICO
(MSB)
15
IC1
14
IC2
13
IC3
(LSB)
12
cr
s
so
S1
S2
S3
S4
CRUIN
39
36
35
25
24
CRUOUT
2
CRUCLK
3
BST1
1
V
CC
V
SS
0
fTJTi
1NT2
INT3
I
NT
4
fNT5
rWT6
in
T7;
pis
(NTs/
P14
fNTg/
P13
INT10/P12
("NTi
1/Pi1
PTT12/P1O
|TJT13/P9
|75T14/P8
1TJT15/P7
PO
P1
P2
P3
P4
P5
P6
40
16
10
17
18
9
8
7
6
*
34
33
32
31
30
29
28
27
23
38
37
21
20
19
OUT
OUT
OUT
OUT
OUT
IN
IN
IN
IN
IN
IN
OUT
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
1/O
I/O
I/O
I/O
I/O
INTERRUPT
Request.
When
active
(low)
(NtREQ
indicates
that
an
enabled
interrupt
has
been
received.
iNTREQ
will
stay
active
until
all
enabled
interrupt
inputs
are
re
moved.
Interrupt
Code
lines.
ICO-IC3
output
the
binary
code
corresponding
to
the
highest
priority
enabled
interrupt.
If
no
enabled
interrupts
are
active
ICO
IC3
-
(1,1.1.1).
Chip
Enable.
When
active
(low)
data
may
be
transferred
through
the
CRU
interface
to
the
CPU.
CT
K
m
no
effect
on
the
interrupt
control
section.
Address
select
lines.
The
data
bit
being
accessed
by
the
CRU
interface
is
specified
by
the
5-
bn
code
appearing
on
S0-S4.
CRU
data
in
(to
CPU).
Data
specified
by
S0-S4
is
transmitted
to
the
CPU
by
CRUIN.
When
CT
is
not
active
CRUIN
is
tn
a
high-
impedance
state.
CRU
data
out
(from
CPUI.
When
CT
is
active,
data
present
on
the
CRUOUT
input
will
be
sampled
during
CRUCLK
and
written
mto
rhe
command
bit
specified
by
S0-S4.
CRU
Clock
(from
CPU).
CRUCLK
specifies
that
valid
data
is
present
on
me
CRUOUT
ime.
Power
Uo
Reset.
When
active
(low)
A^T
1
resets
ail
interrupt
mams
to
0
-esers
1C0
-
*C3
«
<0
0.
0.
0).
INTERQ
1
disables
the
clock,
and
programs
ail
t/Q
ports
to
>nputs.
RST1
has
a
Schmitttriger
.nout
tn
allow
implementation
with
an
RC
circuit
as
shown
m
Figure
7
Supply
Voltage.
*5
V
nominal.
Ground
Reference
System
dock
(o3
in
TMS
9900
system.
CKOUT
in
TMS
9980
system)
RST1
1
0
U
]
40
V
CC
:
ruout
j
0
j
39
SO
:
ruclk
3
0
]
34
RO
CRUIN
4
0
]
37
P1
Cl
s
0
]
S1
-
ri
INT9
c
J
35
S2
in
T
s
7
J
34
iNT7rF15
7
n
?4
1
D
33
TUTs/pie
iNf3
9
32
7
n
T9/P13
0
10
J
31
in
T
iq
/
pi
2
iNTREd
11
a
]
30
7^71
vph
lC3
12
]
29
INT12/F10
IC2
13
]
29
INT
13^9
n
1C1
14
J
27
INT14/P0
ICO
15
J
29
rz
]
25
S3
a
]
24
S4
in
T
i
n
a
]
23
INT
15/RT
*5
19
a
J
22
T3
*5
20
c
]
21
M
Group
1.
interrupt
inputs.
When
active
(Low)
the
signal
is
ANOed
with
its
corresponding
mask
bit
and
•<
enabled
sent
to
tne
interrupt
control
section.
INT
1
has
highest
priority.
Group
2.
programmable
interrupt
(active
low)
or
I/O
pms
(true
logic).
Each
om
is
individually
proqrammaoie
a:
an
interrupt,
an
input
port,
or
an
output
port.
Group
3.
I/O
ports
(true
logic).
Each
pm
IS
individually
programmable
as
an
input
port
or
an
output
port.
Fig.
22
57

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