Texas Instruments 99/4A - Page 83

NOISE GENE R A T 0 R
The noise generator consists of a noise source and an attenuator.
The noise source is a 15 stage shift,register with an exclusive OR
-Feedback network. The -Feedback network will have provisions to
protect the shift register from getting locked in the zero state.
The feedback network will have two feedback tap configuraticns as
determined by the FE control bit.
TABLE 15: NOISE FEEDBACK CONTROL
FB CONFIGURATION
0 "Feriocic" noise
1 "White" noise
Whenever the FB bit is changed, the shift register is cleared. The
shift register will shift at one of four rates as determined by
the two NF bits. The fixed shift rates are derived from the input
c 1 oc k .
TABLE 16: NOISE GENERATOR FREQUENCY CONTROL
BITS
NFO NF 1 SHIFT RATE
0
0
N/512
<3
1
N/ 1024
1 0
N/ 2048
1
1 Tone Gen.
#3
output
The
output of the
noi se
source is fed
to
an attenuator
si mi 1 ar
to
the
tone generator
■ attenuator.
AUDIO SUMMER/OUTRUT BUFFER
The summer is a conventional 1 L operational amplifier summing
circuit. It will sum the three tone generator outputs, noise gen 
erator output, and an external audio source. The output buffer
will generate up to 100 milliamperes into a 8 ohm load, if all
sources are operating at maximum levels. It is assumed that the
speaker will be AC coupled to the chLp.
CPU/SGC INTERFACE
The microprocessor interfaces with the SGC by means of the 8 data
lines and 3 control lines (WE, CE and READY). Each tone generator
requires 10 bits of information to select the frequency and 4 bits
of information to select the attenuation. A frequency update re 
quires a double byte transfer, while an attenuator update requires
a single byte transfer.
CONTROL REGISTERS
The SGC has eight internal registers which are used to control the
three tone generators and the noise source. During all data
transfers to the SGC, the first byte contains a three bit field
which determines the destination control register. The register
address codes are shown in Table 17.
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