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Texas Instruments TMS320C67X - Page 260

Texas Instruments TMS320C67X
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RCPSP Single-Precision Floating-Point Reciprocal Approximation
3-200 Instruction Set SPRU733
Notes:
1) If src2 is SNaN, NaN_out is placed in dst and the INVAL and NAN2 bits
are set.
2) If src2 is QNaN, NaN_out is placed in dst and the NAN2 bit is set.
3) If src2 is a signed denormalized number, signed infinity is placed in dst
and the DIV0, INFO, OVER, INEX, and DEN2 bits are set.
4) If src2 is signed 0, signed infinity is placed in dst and the DIV0 and INFO
bits are set.
5) If src2 is signed infinity, signed 0 is placed in dst.
6) If the result underflows, signed 0 is placed in dst and the INEX and
UNDER bits are set. Underflow occurs when 2
126
src2 infinity.
Pipeline
Stage
E1
Read src2
Written dst
Unit in use
.S
Instruction Type Single-cycle
Delay Slots 0
Functional Unit
Latency
1
See Also RCPDP, RSQRSP
Example
RCPSP .S1 A1,A2
Before instruction 1 cycle after instruction
A1
4080 0000h
4.0 A1 4080 0000h 4.0
A2 xxxx xxxxh A2 3E80 0000h 0.25
Pipeline