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Texas Instruments TMS320C67X - Page 381

Texas Instruments TMS320C67X
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Functional Unit Constraints
4-49PipelineSPRU733
Table 4−33 shows the instruction constraints for 4-cycle instructions executing
on the .L unit.
Table 4−33. 4-Cycle .L-Unit Instruction Constraints
Instruction Execution
Cycle 1 2 3 4 5
4-cycle R W
Instruction Type
Subsequent Same-Unit Instruction Executable
Single-cycle Xw
4-cycle 
INTDP

ADDDP/SUBDP

Instruction Type
Same Side, Different Unit, Both Using Cross Path Executable
Single-cycle
DP compare 
2-cycle DP

4-cycle

Load

Store

Branch

16 × 16 multiply

MPYI

MPYID

MPYDP
Legend: = E1 phase of the single-cycle instruction; R = Sources read for the instruction; W = Destinations written for the
instruction;
= Next instruction can enter E1 during cycle; Xw = Next instruction cannot enter E1 during cycle-write
constraint