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Texas Instruments TMS320C67X - Page 391

Texas Instruments TMS320C67X
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Performance Considerations
4-59PipelineSPRU733
Figure 4−30 shows how a multicycle NOP can be affected by a branch. If the
delay slots of a branch finish while a multicycle NOP is still dispatching NOPs
into the pipeline, the branch overrides the multicycle NOP and the branch
target begins execution five delay slots after the branch was issued.
Figure 4−30. Branching and Multicycle NOPs
EP7
Normal
Cycle #
11
10
9
8
7
6
5
4
3
2
1
Target
E1
DC
DP
PR
PW
PS
PG
Branch
E1
EP6
EP5
EP4
EP3
EP2
EP1
NOP5ADDMPYLD
EP without branch
EP without branch
. . .
B
EP without branch
EP without branch
Branch will execute here
Pipeline Phase
†
†
†
†
†
Branch
EP7
See Figure 4−29(b)
†
Delay slots of the branch
In one case, execute packet 1 (EP1) does not have a branch. The NOP 5 in
EP6 forces the CPU to wait until cycle 11 to execute EP7.
In the other case, EP1 does have a branch. The delay slots of the branch
coincide with cycles 2 through 6. Once the target code reaches E1 in cycle 7,
it executes.