Overview
Interrupts5-10 SPRU733
5.1.3 Summary of Interrupt Control Registers
Table 5−2 lists the interrupt control registers on the C67x CPU.
Table 5−2. Interrupt Control Registers
Acronym Register Name Description Page
CSR Control status register Allows you to globally set or disable interrupts 2-13
ICR Interrupt clear register Allows you to clear flags in the IFR manually 2-16
IER Interrupt enable register Allows you to enable interrupts 2-17
IFR Interrupt flag register Shows the status of interrupts 2-18
IRP Interrupt return pointer
register
Contains the return address used on return from a
maskable interrupt. This return is accomplished via
the B IRP instruction.
2-19
ISR Interrupt set register Allows you to set flags in the IFR manually 2-20
ISTP Interrupt service table pointer
register
Pointer to the beginning of the interrupt service
table
2-21
NRP
Nonmaskable interrupt return
pointer register
Contains the return address used on return from a
nonmaskable interrupt. This return is accom-
plished via the B NRP instruction.
2-22
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