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(iii) CPL switch
If the user needs to operate the CPL for binary input circuit #1, the user should set On for
scheme switch [BI1_CPL]. Conversely, the user should set Off for scheme switch [BI1_CPL] if
CPL is not required. Since the entire range of binary input circuits have CPLs, a setting of On
or Off is a pre-requisite for every binary input circuit. The number of CPL is equal to number
of binary input circuits: that is, if BI1A is selected, the number of CPLs is 18.
(iv) Delayed pick-up and delayed drop-off signal
Both an on-delay timer and an off-delay timer are provided in CPL; both are used to adjust the
timing for input signals, the user should set their respective time values for settings [On Delay
Timer] and [Off Delay Timer].
(v) Logic level inversion
The Logic inversion function can invert the input signal and is provided for each binary input
circuit; the user can invert an input signal by setting Inverse for scheme switch [INVERSE-
SW]. A setting of Normal is also provided when inversion is not required.
(vi) How to set the settings for binary input circuits
Figure 5.4-4 illustrates an example of the binary IO module arrangement for the binary input
circuit printed circuit boards (PCBs); it illustrates the setting targets are on a BI1A at IO#1
and a BIO1A at IO#3. The user should key the settings with regard to the BI1A and BIO1A
using the setting tables for IO_SLOT1 and IO_SLOT3. As the setting points are for the BI1A
and BIO1A at the IO#1 and IO#3, the user should take the setting table of the standard type
(in sec. 5.4.6).
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