Toshiba GR200 Series - 5.4.8 Settings of binary output circuits; (i) Setting table (IO_SLOT1) at IO#1 (Function ID 200 B01)

6F2S1914 (0.49)
GRL200 (Soft 033 & 037)
- 1079 -
5.4.8 Settings of binary output circuits
(i) Setting table (IO_SLOT1) at IO#1 (Function ID 200B01)
Setting item
Range
Units
Contents
Default setting
value
Notes
BO1
BO1_CPL
Off / On
-
Programmable binary output enable
Off
Input signal1
(Data-ID from other FBs)
-
First Data ID as input signal #1 for Logic gate
Not assigned
Input signal2
ditto
-
Second Data ID as input signal #2 for Logic gate
Not assigned
Input signal3
ditto
-
Third Data ID as input signal #3 for Logic gate
Not assigned
Input signal4
ditto
-
Forth Data ID as input signal #4 for Logic gate
Not assigned
Input signal5
ditto
-
Fifth Data ID as input signal #5 for Logic gate
Not assigned
Input signal6
ditto
-
Sixth Data ID as input signal #6 for Logic gate
Not assigned
Input signal7
ditto
-
Seventh Data ID as input signal #7 for Logic gate
Not assigned
Input signal8
ditto
-
Eighth Data ID as input signal #8 for Logic gate
Not assigned
LOGIC-SW
AND / OR / XOR
-
Operation selection in Logic gate
AND
On Delay Timer
0.000 - 300.000
s
On delay timer value
0.000
Off Delay Timer
0.000 - 300.000
s
Off delay timer value
0.000
INVERSE-SW
Normal / Inverse
-
Binary signal inversion
Normal
TIMER-SW
Off / Delay / Dwell / Latch
-
Selection of Logic circuit
Off
Logic Timer
0.000 - 300.000
s
Off delay timer value for "Delay" and "Dwell"
circuit
0.000
Reset signal
(Data-ID from other FBs)
-
Reset signal selection for "Latch" circuit
Not assigned
BO2
BO2_CPL
Off / On
-
Programmable binary output enable
Off
Input signal1
(Data-ID from other FBs)
-
Keying Data ID#1 as input signal for Logic gate
Not assigned
Input signal2
ditto
-
Keying Data ID#2 as input signal for Logic gate
Not assigned
Input signal3
ditto
-
Keying Data ID#3 as input signal for Logic gate
Not assigned
Input signal4
ditto
-
Keying Data ID#4 as input signal for Logic gate
Not assigned
Input signal5
ditto
-
Keying Data ID#5 as input signal for Logic gate
Not assigned
Input signal6
ditto
-
Keying Data ID#6 as input signal for Logic gate
Not assigned
Input signal7
ditto
-
Keying Data ID#7 as input signal for Logic gate
Not assigned
Input signal8
ditto
-
Keying Data ID#8 as input signal for Logic gate
Not assigned
LOGIC-SW
AND / OR / XOR
-
Operation selection in Logic gate
AND
On Delay Timer
0.000 - 300.000
s
On delay timer value
0.000
Off Delay Timer
0.000 - 300.000
s
Off delay timer value
0.000
INVERSE-SW
Normal / Inverse
-
Binary signal inversion
Normal
TIMER-SW
Off / Delay / Dwell / Latch
-
Selection of Logic circuit
Off
Logic Timer
0.000 - 300.000
s
Off delay timer value for "Delay" and "Dwell"
circuit
0.000
Reset signal
(Data-ID from other FBs)
-
Reset signal selection for "Latch" circuit
Not assigned
…..
……
…….
…….
……..
BO18
BO18_CPL
Off / On
-
Programmable binary output enable
Off
Input signal1
(Data-ID from other FBs)
-
Keying Data ID#1 as input signal for Logic gate
Not assigned
…….
…….
…….
…….
Input signal8
ditto
-
Keying Data ID#8 as input signal for Logic gate
Not assigned
LOGIC-SW
AND / OR / XOR
-
Operation selection in Logic gate
AND
On Delay Timer
0.000 - 300.000
s
On delay timer value
0.000
Off Delay Timer
0.000 - 300.000
s
Off delay timer value
0.000
INVERSE-SW
Normal / Inverse
-
Binary signal inversion
Normal
TIMER-SW
Off / Delay / Dwell / Latch
-
Selection of Logic circuit
Off
Logic Timer
0.000 - 300.000
s
Off delay timer value for "Delay" and "Dwell"
circuit
0.000
Reset signal
(Data-ID from other FBs)
-
Reset signal selection for "Latch" circuit
Not assigned