EasyManua.ls Logo

u-blox ZED-F9P - SPI Interface; D_SEL Interface; RESET_N Interface; SAFEBOOT_N Interface

u-blox ZED-F9P
114 pages
Print Icon
To Next Page IconTo Next Page
To Next Page IconTo Next Page
To Previous Page IconTo Previous Page
To Previous Page IconTo Previous Page
Loading...
ZED-F9P-Integration Manual
UBX-18010802 - R02

5 Hardware description Page 73 of 114
Advance Information
With firmware version HPG 1.00 the default baud rate is 38400 baud and it is not
recommended to run at a baud rate lower than this with the default NMEA messages.
5.3.2 SPI interface
The ZED-F9P high precision receiver has a SPI slave interface that can be selected by setting D_SEL
= 0. The SPI slave interface is shared with UART1. The SPI pins available are: SPI_MISO (TXD),
SPI_MOSI (RXD), SPI_CS_N, SPI_CLK. The SPI interface is designed to allow communication to a
host CPU. The interface can be operated in slave mode only. The maximum transfer rate using SPI
is 125 kB/s and the maximum SPI clock frequency is 5.5 MHz.
5.3.3 D_SEL interface
At startup, the D_SEL pin selects the available interfaces pins between SPI and UART/DDC
operation. If D_SEL is set high or left open, UART1 and DDC are made available. If D_SEL is set low,
i.e. connected to ground, the ZED-F9P module can communicate using SPI.
5.3.4 RESET_N interface
The ZED-F9P high precision receiver provides a RESET_N pin to reset the system. The RESET_N
pin is an input-only pin with an internal pull-up resistor. Driving RESET_N low resets the module.
Pull the pin low for at least 100 ms to ensure correct operation.The RESET_N input complies with
the VCC level.
The RESET_N pin will trigger a cold start and therefore should only be used as a recovery
option and not a Power On Reset.
5.3.5 SAFEBOOT_N interface
The ZED-F9P high precision receiver provides a SAFEBOOT_N pin that is used to command the
receiver into SAFEBOOT.
If this pin is low at power up, the receiver starts in Safe Boot Mode and GNSS operation is disabled.
It can be used to recover from situations where the Flash has become corrupted and needs to be
restored.
In Safe Boot mode the receiver runs from a passive oscillator circuit with less accurate timing and
hence the receiver is unable to communicate via USB.
In this mode only UART1 and DDC communication is possible. For communication via UART1 in Safe
Boot Mode, a training sequence (0x 55 55 at 9600 baud) must be sent by the host to the receiver in
order to begin communication. After this the host must wait at least 2 ms before sending any data.
Safe Boot Mode is used in production to program the Flash and to set the Low Level Configuration
in the eFuse. It is recommended to have the possibility to pull the SAFEBOOT_N pin low in the
application. This can be provided using an externally connected test point or a host I/O port.
5.3.6 TIMEPULSE interface
The ZED-F9P high precision receiver provides a time pulse on the TIMEPULSE pin.
5.3.7 TX_READY interface
The TX_READY function is used to indicate when the receiver has data to transmit. A listener
can wait on the TX_READY signal instead of polling the DDC or SPI interfaces. The CFG-TXREADY
message lets you configure the polarity and the number of bytes in the buffer before the TX_READY
signal goes active. The TX_READY function is disabled by default.
5.3.8 USB interface
The USB interface is compatible with the USB version 2.0 FS (Full Speed, 12 Mb/s) interface.

Table of Contents

Other manuals for u-blox ZED-F9P

Related product manuals