Xilinx Kria K26 SOM - Page 13

Table 4: SOM240_1 Signal Pins (cont'd)
Pin Number Signal Name Signal Description
B25 PS_ERROR_STATUS_M2C PS error status from SOM
B26 PWROFF_C2M_L Control signal to turn off all power rails on the SOM
B27 GND Ground
B28 MIO35 PS MIO signal on bank 501. Optional use as PMU output.
B29 MIO36 PS MIO signal on bank 501
B30 MIO37 PS MIO signal on bank 501
B31 GND Ground
B32 MIO38 PS MIO signal on bank 501
B33 MIO39 PS MIO signal on bank 501
B34 MIO40 PS MIO signal on bank 501
B35 GND Ground
B36 MIO50 PS MIO signal on bank 501
B37 MIO51 PS MIO signal on bank 501
B38 Reserved Not connected to SOM connector
B39 GND Ground
B40 MIO58 PS MIO signal on bank 502
B41 MIO59 PS MIO signal on bank 502
B42 MIO60 PS MIO signal on bank 502
B43 GND Ground
B44 MIO70 PS MIO signal on bank 502
B45 MIO71 PS MIO signal on bank 502
B46 MIO72 PS MIO signal on bank 502
B47 GND Ground
B48 GND Ground
B49 GTR_REFCLK1_C2M_P PS-GTR REFCLK1 input
B50 GTR_REFCLK1_C2M_N PS-GTR REFCLK1 input
B51 GND Ground
B52 GND Ground
B53 GTR_DP2_C2M_P PS-GTR lane 2 RX
B54 GTR_DP2_C2M_N PS-GTR lane 2 RX
B55 GND Ground
B56 GND Ground
B57 GTR_DP0_M2C_P PS-GTR lane 0 TX
B58 GTR_DP0_M2C_N PS-GTR lane 0 TX
B59 GND Ground
B60 VCC_SOM SOM main supply voltage, +5V
Connector Row C
C1 GND Ground
C2 GND Ground
Chapter 2: Electrical Design Considerations
UG1091 (v1.0) April 20, 2021 www.xilinx.com
Carrier Card Design for Kria SOM 13
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