JOHNSON CONTROLS
39
SECTION 4 - CYCLING SHUTDOWNS
FORM 160.00-O4
ISSUE DATE: 07/31/2019
4
MESSAGE DESCRIPTION
Harmonic Filter
Communications
IEEE-519 FILTER FAULT
This shutdown states that the hardware on the harmonic lter logic board is indicat-
ing a fault, but the software on the harmonic lter logic board does not state why.
The harmonic lter logic board signals a fault condition to the OSCD logic board
but does not respond to a software request for fault information.
Harmonic Filter - Logic Board
Power Supply
FLTR POWER SUPPLY FLT
This shutdown indicates that one of the low voltage power supplies on the harmon-
ic lter logic board have dropped below their permissible operating voltage range.
The harmonic lter logic board receives its power from the OSCD logic board. The
power supplies for the OSCD logic board are in turn derived from the secondary of
the 120 to 24 VAC transformer.
Harmonic Filter - Low DC Bus
Voltage
FLTR LOW BUS VOLTAGE FLT
The harmonic lter dynamically generates its own lter DC link voltage by the inter-
action of the harmonic lter inductor and switching its transistors. This DC level is
actually higher than the level obtained by simply rectifying the input line voltage.
The DC link voltage is always higher on
the harmonic lter power unit then on the
OSCD VSD power unit.
Thus the harmonic lter actually performs a voltage “boost” function. This is neces-
sary in order to permit current to ow into the AC line from the harmonic lter when
the AC line is at its peak level. This particular shutdown and its accompanying
message are generated when the harmonic lter’s DC link voltage drops to a level
less than 80 VDC (for 380 through 460 VAC input voltage), 110 VDC (for 424 HP)
and 140 VDC (for 575 VAC input voltage 608 HP) below the harmonic lter DC link
voltage setpoint.
Harmonic Filter - Phase
Locked Loop
FLTR PHASE LOCK LOOP FLT
This shutdown indicates that a circuit called a “phase locked loop” on the harmonic
lter logic board has lost synchronization with the incoming power line for a period
of time.
Harmonic Filter - Precharge -
Low DC Bus Voltage
FLTR PCHARGE LOW BUS V FLT
Two minimum voltage thresholds must be met in order to complete the precharge
cycle. The rst occurs 1/10th of a second after pre-charge is initiated and the other
occurs 5 seconds after precharge is initiated. See table below for specic values.
NOMINAL INPUT
VOLTAGE VALUE
1ST MINIMUM
VOLTAGE VALUE
2ND MINIMUM
VOLTAGE VALUE
380-460 VAC 41 VDC 425 VDC
575 VAC 60 VDC 630 VDC
Harmonic Filter - Run Signal
FLTR RUN RELAY FLT
When a digital run command is received at the harmonic lter logic board from the
OSCD logic board, a 1/10 second timer is started. A redundant run command must
also occur on the communication link from the OSCD logic board before the timer
expires or the OSCD will be shut down.
TABLE 4 - CYCLING SHUTDOWN MESSAGE (CONT'D)