Zenith J584W - Page 28

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Figure 1 1B illustrates the basic concept of a Phase Locked
Loop (PLL). A Voltage Controlled Oscillator (VCO) is tuned
to a given free running frequency. A portion of the VCO
output is fed back to a phase detector, which also receives
an external signal (19kHz in this case). These signals are com 
pared for frequency and phase. Any difference is fed to a
filter, the output of which will be a correction voltage ap 
plied to the VCO. This voltage keeps the VCO output on
frequency and in phase with the input signal.
Proper adjustment of the VCO is made by connecting a fre 
quency counter to test point "M" (pin 10 of IC301) and
adjusting R302 for 19kHz. In an emergency, if a frequency
counter is not available, you might try the following: tune in
a station broadcasting stereo and adjust R302 until the stereo
indicator turns on, then adjust control R302 to the center of
the turn-on range.
Figure 12 is a block diagram, while Figure 13 is a schematic,
of the PLL mutliplex decoder (IC301 ). The three basic func 
tions of IC301 include:
1. Regeneration of the 38kHz subcarrier frequency.
2. Stereo indicator switch.
3. Decoding (matrixing the L+R, and L — R/38kHz to provide
the L and R outputs).
At the left in the upper row of Figure 12 is the input amplifier
connected between pins 2 and 3. There are three outputs of
this amplifier; The first output is to the Demodulator which
we will discuss later. At pin 3 the signal is coupled, via C302,
to pin 11 from which the signal goes to both the Phase De 
tector and the Amplitude Detector. Lets move three stages
to the right of the Phase Detector where we find the 76kHz
VCO who's free running frequency is controlled by C305,
R302 and R303. Output of the VCO goes to two divide by
two stages, resulting in outputs of 38kHz and 19kHz re 
spectively. This 19kHz is available for external measurement
at pin 10 (Test Point "M"), as well as being fed back to the
Phase Detector, where the phase and frequency of this 19kHz
is compared with the input 19kHz. Any difference is fed to
the low pass filter (including external components at pins
12 and 13), and converted to a DC correction voltage; to be
applied to the VCO if the VCO changes frequency.
Also at pin 11 is the Amplitude Detector which receives
both the input 19kHz and the 19kHz output from a third
divide by two stage. The Amplitude Detector will sense
the level of the incoming 19kHz pilot level. If the level ex 
ceeds minimum, it will have an output applied to the low I
pass filter (including external components at pins 8 and 9)
and to the trigger stage. The trigger stage will activate the
Stereo Indicator Light (DS301) and permit the Stereo Switch
to pass 38kHz to the Demodulator.
FIGURE 13 - CHASSIS 3WJR52 FM MUL TIP LEX SCHEMA TIC