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EXERCISE 34 : GRAPHICAL TEST GENERATOR
ACTION
Study the format of the Graphical test Generator Window and consult the supplied document
on using the Graphical Test Generator. Practise using outside the TestFlow
DESCRIPTION
The Graphical Test Generator instrument is designed to allow a user definable digital
waveform sequence to be produced. One application for this instrument could be that a
stimulus sequence is applied to a PCB to initialise the board into a known state before a
particular test is carried out. Up to 256 channels (depending on your hardware configuration)
and 230 steps are possible, using the digital outputs that are normally used by the IC Tester.
The instrument can also be used to learn and evaluate the digital response of the board, so
that a functional test with a PASS/FAIL result can be developed without any form of
programming.
In this example, a pre-defined test pattern is included on the disk with the training board,
with the filename TRAINPAL.PAT. This file will be loaded automatically by the test sequence.
COMMENTS
For security, the Graphical Test Generator cannot be re-configured during a test sequence. To
experiment further with this instrument, close the test sequence and open the instrument
manually.
The Graphical Test Generator has an associated document provided on the CD. Please
refer to this document to understand fully the use of the Test Generator.
EXERCISE 35 : SHORT LOCATION
ACTIONS
Connect SOIC clip to U10. Attach BDO LOW to TP1 to disable U13 and stop Conflict. Press
START on the IC tester and observe result. You will see L2 on pin 18 and 16. (If remove the
Jumper J3 to BUS_SHORT connector, you will see this link come and go)
Note Links between pins on Outputs A9 & A10.
DESCRIPTION
A short circuit between 2 or more pins on the board under test could be a design feature, a
PCB etching fault, excessive solder linking 2 pins or a faulty IC (internal short). On the
training board, we have simulated a short on a bus between A9 and A10 that can be switched
in or out as required. When testing Buffers (or any IC connected to the same data bus) a
LINK will appear between A9 and A10 indicating these pins are connected. The Short Locator
can then be used to locate the exact area on the board where the short lies.
COMMENTS
This often indicates shorts such as solder bridges between IC pins WITHOUT a truth table
test, especially when compared with a known good board. These types of faults are very easy
to find, even if the IC is not in the library. You can do this test with no power applied to the
board (only a ground reference is required), so you can find shorts which could perhaps
damage an expensive component if the board was powered.
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