Akai DV-R4100VSS

68
67
U5 SST39V800FA
I/O Buffers and Data Latches
Y-Decoder
EEPROM
Cell Array
X-Decoder
Address Buffer & Latches
Control Logic
Memory Address
CE#
OE#
WE#
D
Q
-
D
Q
1
5
0
1
2
3
4
A
B
-
-
+
+
5
6
7
8
IC501, IC502 LS4558N
CPU
RAM (8Kbytes)
Bit search module
DMA controller
(8ch)
Bus converter (32bits-16bits)
Clock control unit
(Watchdog timer)
Interrupt control
unit
DREQ0 to
DREQ2
DACK0 to
DACK2
EOP0 to
EOP2
X0
X1
RSTX
HSTX
INT0 to
INT5
NMIX
AN0 to AN3
AVcc
AVss/AVRL
AVRH
ATGX
SI0 to SI2
SO0 to SO2
SC0 to SC2
STRBIN
DVDSOS
STREQ/
DRVVLD
10-bit
A/D converter
(4 ch.)
UART (3ch)
Reload timer (3ch)
Port D,E,F
A/V I/F port
Flash memory
(510KB)
RAM(2Kbytes)
Port0 to port B
DRAM
controller
Bus
controller
Bus converter
(Harvard _ Princeton
D16 to D31
A00 to A24
RDX
WR0X,WR1X
RDY
CLK
BRQ
BGRNTX
CS0X to CS5X
RAS0
RAS1
CS0L
CS0H
CS1L
CS1H
DW0X
DW1X
3
3
3
/
/
/
/
/
/
/
/
/
/
/
/
4
6
3
3
3
16
25
2
6
R-bus(16bits)
C-bus(32bits)
D-bus(32bits)
I-bus(16bits)
U14 ZR36707TQC
STARTING
CIRCUIT
CURRENT
GENERATOR
REFERENCE
VOLTAGE
ERROR
AMPLIFIER
THERMAL
PROTECTION
SOA
PROTECTION
SERIES
PASS
ELEMENT
1
INPUT
2
OUTPUT
3
GND
IC801 LM78L05ACZ
1
2
3
4
7
6
5
8
V
+
B
B
B
B
+IN
+IN
OUT
OUT
-IN
-IN
A
A
A
A
V
-
U11 NJM4580E
U12, U13 LS4580F
Interpolator
Equalizer
Viterbi
Algorithm
Reconstructed
data
Threshold
Edge
flag/pos
W
i
d
t
h
Measurer
Threshold
DPLL
Frequency
Detector
MUX
Defect
Detector
Defect
Lock
Defect
PLL rate
PLL data EQ data
PLL offset
AGC
ADC data
U2 ZR36768HQC
U9 TC74HCU04AF
1
14
2
13
3
12
4
11
5
10
6 9
7 8
1A
Vcc
1Y
6A
2A
6Y
2Y
3A
5Y
5Y
3Y
4A
GND
4Y