No. Symbol I/O Terminal Description
1 BDO I Drop-Out signal input terminal. (H:Drop-Out)
2 OFT I Off Track signal input terminal. (H:Off Track)
3 /RFDET I RF detect signal input terminal. (L:detection)
4 VDET I Vibration detect signal input terminal. (H:detection)
5 LDON O Laser ON signal output terminal. (H:ON)
6
7
8 AVSS3 - GND connect terminal for analog circuit.
9 AVDD3 - Power supply terminal for analog circuit.
10 FBAL O Focus Balance adjustment output terminal.
11 TBAL O Tracking Balance adjustment output terminal.
12 FE I Focus Error signal input terminal. (analog input)
13
14
15 TE I Tracking Error signal input terminal. (analog input)
16
I
18
19 RFENV I RF Envelop signal input terminal. (analog input)
20 VREF I VREF input terminal.
21 ARF I RF signal input terminal. (for DSL)
22 DRF(NC) I Bias terminal for DSL. (No connect)
23 DSLF I/O Roop Filter terminal for DSL.
24 IREF I Standard current input terminal.
25 PLLF I/O Roop Filter terminal for PLL.
26 PLLF2 I/O Characteristic Roop Filter switching terminal for PLL.
27 VCOF I/O Roop Filter terminal for VCO.
28 VCOF2 I/O Terminal of Digital Servo (33.8688MHz)/Roop Filter for VCO.
29 TRV O Traverse compulsion sending output terminal.
30 TVD O Traverse drive output terminal.
31 PC O Spindle Motor ON output terminal.
32 ECM O Spindle Motor driving signal terminal. (compulsion mode output) 3-State
33 ECS O Spindle Motor driving signal terminal. (Servo Error signal output)
34 KICK O Kick Pulse output terminal. 3-State
35 TRD O Tracking Drive output terminal.
36 FOD O Focus Drive output terminal.
37 TOFS O Tracking Offset adjustment output terminal.
38 AVDD2 - Power supply terminal for analog circuit. (for DSL,PLL,AD and DA block)
39 AVSS2 - GND connect terminal for analog circuit. (for DSL,PLL,AD and DA block)
40 DVSS2 - GND connect terminal for digital circuit.
41 EFM/CK384(NC) O EFM signal output terminal at IOSEL=L. (No connect)
42 PCK/DSLB O
PLL Sampling Clock output terminal. (fPCK=4.3218MHz)
*at default:PLL Sampling Clock output
*at fulfillment command:DSL Balance output
43 /CLDCK(NC) O
Sub Code Frame Clock signal output terminal. (fCLDCK=7.35KHz)
(No connect)
44 FCLK(NC) O
Crystal Frame Clock signal output terminal. (fFCLK=7.35KHz)
(No connect)
45 IPFLAG(NC) O
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