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Alstom MiCOM P50 Agile P15D - Page 25

Alstom MiCOM P50 Agile P15D
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P50 Agile P15D
3 Hardware Design
P15D/EN TM/B
3-5
The CPU design is a hybrid of the digital signal processor (DSP) and high speed micro controller
which runs complex algorithm for deriving the fundamental & harmonic component from the input
current signals. The digital inputs and outputs modules are designed to interface the monitoring,
control and protection signals through optically isolated circuit as per the field requirements. The
others peripherals modules like 16x2 LCD display, feather touch keys, USB and RS485
communication interfaces, battery backup circuits for relay parameters display, built in memory circuits
etc. are integrated as per the schematic diagram and enclosed in the IP-52 enclosure.
FOR SCADA (CB NO)
REMOTE TRIP
REGULATOR
AUXILIARY
SUPPLY
(OPT)
FLAG
COIL
SMPS
TRIP
COIL
NON-
LATCHING
TYPE
CONTACT
LATCHING
TYPE
CONTACT
DISPLAY
KEYBOARD
ISOLATIONISOLATION
USB DRIVER 485 DRIVER
BATTERY
SWITCHING
CIRCUIT
MOSFET
SWITCHING
CIRCUIT
P5003ENa
Figure 2: Hardware design overview

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