ASROCK Rack ALTRAD8UD-1L2T - Page 54

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Processor OS-rst
Use this item to enable the operating system to prioritize processor errors through the
AEST ACPU table.
DDR CE Threshold
is species the Number of DDR CEs to occur before using interrupt based notication
to the OS rather than allowing the OS to poll for CEs.
Processor CE Threshold
is species the Number of processor CEs to occur before using interrupt based
notication to the OS rather than allowing the OS to poll for CEs.
DDR Link Error Threshold
is species the Number of DDR link errors before considering it fatal severity.