ASROCK Z690 PG Riptide - Page 78

English
71
Z690 PG Riptide
tRDWR_dr
Congure between module read to write delay.
tRDWR_dd
Congure between module read to write delay.
tWRRD_sg
Congure between module write to read delay.
tWRRD_dg
Congure between module write to read delay.
tWRRD_dr
Congure between module write to read delay.
tWRRD_dd
Congure between module write to read delay.
tWRWR_sg
Congure between module write to write delay.
tWRWR_dg
Congure between module write to write delay.
tWRWR_dr
Congure between module write to write delay.
tWRWR_dd
Congure between module write to write delay.
Round Trip Timing
Round Trip Timing Optimization
Auto is enabled in general case.
Round Trip Level
Congure round trip level.
Initial RTL (MC0 C0 A1/A2)
Congure round trip latency initial value.