Asus M4N68T LE V2 - CPU Configuration

2-12 Chapter 2: BIOS information
2.4.2 CPU Conguration
The items in this menu show the CPU-related information that the BIOS automatically
detects.
GART Error Reporting [Disabled]
This option should remain disabled for the normal operation. The driver developer may
enable it for testing purpose. Conguration options: [Disabled] [Enabled]
Microcode Updation [Enabled]
Enables or disables Microcode Updation. Conguration options: [Disabled] [Enabled]
Secure Virtual Machine Mode [Disabled]
Enables or disables Secure Virtual Machine Mode (SVM). Conguration options: [Disabled]
[Enabled]
Cool ‘n’ Quiet [Enabled]
Enables or disables the AMD
®
Cool ‘n’ Quiet technology. Conguration options: [Enabled]
[Disabled]
ASUS Core Unlocker [Disabled]
Enables the ASUS Core Unlocker to get the full computing power of the processor. Select
[Disabled] to disable this function. Conguration options: [Enabled] [Disabled]
CPU Core Activation [Auto]
Allows you to set the active CPU cores. Conguration options: [Auto] [Manual]
The following items appear only when you set CPU Core Activation to
[Manual].
2nd Core [On]
Enables or disables the second CPU core. Conguration options: [On] [Off]
3rd Core [On]
Enables or disables the third CPU core. Conguration options: [On] [Off]
4th Core [On]
Enables or disables the fourth CPU core. Conguration options: [On] [Off]
2.4.3 Chipset
NorthBridge Conguration
Memory Conguration
Bank Interleaving [Disabled]
Allows you to enable the bank memory interleaving. Conguration options: [Disabled]
[Auto]
Channel Interleaving [XOR of Address bit]
Allows you to enable the channel memory interleaving.
Conguration options: [Disabled] [Address bits 6] [Address bits 12]
[XOR of Address bits [20:16, 6]] [XOR of Address bits [20:16, 9]]