Commodore 1541 - Page 34

Pl, INPUT PWR
9Vfll
0V 02
PZ, SERIAL BUS
SER Ck 1/0
SER ATN 1/0
SER DATA l/0
RrnT
SER SRQ 1/0
GNO
P4, SE.RIAL BUS
SER Ck 1/0
SE'R ATNl/0
SER DATA !/0
RESET
SER SRO 1/0
GNO
Ll3
Ll6
+ !V
CR2
IN4002
U2
1
LM340-12
GNO
••
330
c••
3.3V
+
I
c1•
10,,
20V
I
c•• I c•o IC47
~ 0.1JIF ~ OJ,11F "=' 0.1.-,F
R7 UAIB
IOK 1/6 74LSl4
+ov
.... v
..
I.OK
•-I»-•-------------------+--~
·~·-------------------+-~
.....
~ ~f'""'.._ ,-11-l)o-,o
'-r"
UD3A U81E
I 1-[:>o-lO --1---+-4-,i--
UAIE
l 1/4 74LS86 1/6 7406
1/6 74LS14
'- ...... _________________ _...12-<>(J-13
U81F
1/6 7406 El
0
+sv NOTE 4 l
t ~
+5V
+5V
+
14
+•v
~
+•v
+5V
.,.
CR7
14
+ov
•
20
40 CAI
Vee c"s'z
CA2 DO
CBI DI
CB2
D2
PAO 03
PAI 04
PA2
o•
PA3 06
PA4 07
PA5 UC3 RS0
PA6 6522 RSI
PA7 VIA RS2
PBO
RS3
PBI
cs,
PB2
P83
...
p ..
02
RsT
P87
Vu
I
J..
iITTf\'
I.OK ~ ~ 100K IN4146 14
I 2--1 2 5"\~
UAIA USIA + r4-/l....,,,r
6
'
______ UC_6_C..::.::=c_ ____ _.
7 1/6 74LS14 7 1/6 7406 I C46 J_ 0038 1/4 74LS00
{ ..i ":' ll~~pF ~ i/6 7406 ~9
8
"'-\...J-10-41-------+-
I
~--•---•-<{:J!~e-o(J-•
UCISB UCM
20 l/4 74LS00 1/6 74LS04
---------, .. , .... -------·
UB3
2364
18
UB2
2015
Vee
2K ~RAM
20
2j
v
GND
21
121,.
r----------------------------,
I I
I
r-------- ----,
I
I
I
I
I
I
I
'" Ia2 Ic10
220vF 0.033vF O lµF
I I
..,.. 25V -=- '"="
L5
"
14
14
I I
I I
I I
CU Vee TC
co
12~ ENCODER/DECODER CLOCIC
YI
11MHz OSC
"'
11,I I
~:...:.....I 11
I
I
L3
I
LO "
15 A ~
w~
• w J
~.
f
1
9
o, C ,
D CLR GNO
LG
I
I
I
I
I
I
I
I
I
'----------- BIT SYNC
RI
47
L4 L 7
L ________________________ _
L_
_ _______ _J
H
+ov
1
m
Vee CAI
4
DO
CA2
39---- BYTE SYNC
ENABLE
DI CBI
02 CO2
19 ~READ/Wiii'Tf
D3 PAO 2 -----.PAO
D4 PAI 3 ____.PAI
o•
PA2 4_,...PA2
06 PA3
5 __...PA3
07 PA4
1---..PA4
RSO UC2
...
7__...PA5
RSI 6522 PA6
8 ---.PA6
RS2 VIA PA7
9-+PA7
RS3
PBO
IO____.I SELA
CSI PBI 11----...a SEL 8
PB2 12~0N/OFF
2 Rli PB3
13___.LED
iili
PB4 14----C WRiTE PROTECT
CLOCK SEL A
02
p ..
,.
CLOCK SEL B
RST P86
16
Vu
PB7
17~ BLOCK SYNC
I
+ ..
{-
16
v"
A
•
UC7
1...____
HV
f
1
1
!D-11 -11 -[)o-10
UC:6 UC5
1/4 74LSOO 1/6 74LS04
V<e
8
02
03
04
D5
06
07
"'
Al
A2
A3
A4
A5
A6
A7
AB
A9
AIO
All
AJ2
.,,
AJ4
AIO
.,.
UC4
6502
8 BIT MPU
.J,.
SO 381--1--l.-1---'------- .... I-----C BYTE SYNC
fM N 37--l.---------4--1-'
NMi 6
+5V
RID
2.0I<
+5V
••
2.0k
+5V
• ••
2.01(
ROY 2--1------'
iRQ" 4 --1-----4--41--_J
HV
1112 39
~ UC5A UCSF
14 1/6 NLS04 1/6 74LS04
I ~2--13-£:>o-12
+ov
+
14
Rl'lf
Vu Vu
3
-t>:c~ta _______ ~ r?;.:
I 21
-!- J.
l 1/6 74LS04 l.1/6 74LS00
Figure
F-1.
Disk Controller
(Sheet 1 of
@ COPYRIGHT 1984 MICHAEL G. PELTIER
Page F-10
Stepping motor housing
NO'fES:
1. ALL RESISTORS ARE 10%, l/4W UNLESS
NOTED.
2. ALL RESISTANCE IS EXPRESSED IN OHMS
UNLESS OTHERWISE NOTED.
3. TIIE FOLLOWING DYPASS CAPACITORS ARE
CONNECTED BETWEEN THE +5V LINE AND
GROUND. ALL THESE CAPACITORS
LISTED
ARE 0.1 UF, CERAMIC.
C6 C7 CS C22 C27 C28 C29 C30
4. El AND E2 PROGRAM THE DISK
CONTROLLER ADDRESS.
ADDRESS
8
9
10
11
El
CLOSED
OPEN
CLOSED
OPEN
P.C.Bd.
2)
Schematic
E2
CLOSED
CLOSED
OPEN
OPEN
® COPYRIGHT 1984 MtCUAtL 5