Commodore Plus 4 - Page 253

The 6502 Microprocessor 241
placed at the position indicated by the SP, and the SP is decremented. When an
item is pulled from the stack, the SP is incremented, and the value is gotten from
the position indicated by this new value for the SP. In addition to being affected
when a push onto or pull from the stack is performed, the SP value can be altered
with the TXS instruction or put into the X register with the TSX instruction.
The stack is used by the processor to store the return address for a return from
subroutine. When a JSR instruction is executed, the address of the last byte of the
JSR instruction is pushed onto the stack (using two stack locations). When an
RTS instruction is executed, the 2 bytes are pulled from the stack and placed in
the program counter. The PC is then incremented and points to the instruction
following the JSR instruction.
The processor uses the stack in a similar fashion when it receives an interrupt.
In this case, however, not only the return address but also the current value of the
status register are pushed onto the stack before the interrupt is processed. When
an RTI instruction is executed, the status register value and the 2 return address
bytes are pulled off the stack and restored.
Four additional instructions affect the stack: PHA, PHP, PLA, and PLP.
PHA and PHP push the accumulator and status register, respectively, onto the
stack. PLA and PLP pull a value from the stack and place it in the accumulator
and status register, respectively.
Care must always be taken to maintain the stack properly; that is, do not
perform a JSR without a corresponding RTS, and vice versa. Do not perform a
PHA or PHP without a corresponding PLA or PLP. Failure to properly match
the pushes with pulls from the stack may have bizarre and unpredictable results.
It is possible to overflow the stack. Usually this occurs because of improper
nesting rather than an actual need for more space. If a program overflows the
stack from a need for more space, it should be reorganized to use the stack more
sparingly.
Instruction Set
The instructions available in the 6502 microprocessor are presented in alphabeti
cal order. A short explanation of the instruction, and which registers and flags it
affects, introduces the instruction. The following table shows the available
addressing modes for the instruction (see the next section for an explanation of all
the addressing modes), the proper syntax for using the instruction from the
built-in machine-language monitor, the hexadecimal opcode, the number of
bytes the instruction occupies, and the number of machine cycles it takes to
execute. At the end of this section, all of this information is briefly summarized.
Each instruction is accompanied by short example programs. These programs
may be entered through the machine-language monitor (see the previous section