Commodore Plus 4 - Page 263

The 6502 Microprocessor 351
. 2000 A2 04 LDX #$04 Start counter at highest byte to copy.
. 2002 BP 15 PF LDA $FF15,X Get register value.
. 2005 9D 00 21 STA $2100,X Store in memory.
. 2008 CA DEX Decrement the counter.
. 2009 10 F7 BPL $2002 If not done, continue.
. 200B 00 BRK Stop processing.
BRK—Force an Interrupt
An interrupt occurs, the values of the PC and SR are pushed on the stack, and
processing continues through the IRQ vector.
Operation: PC + 2 1 Flags Affected: B
SRI
Addressing Mode Syntax Opcode Bytes Cycles
Implied BRK 00 1 7
The B flag is set to 1 before the status register is pushed onto the stack, and then
is cleared to 0. Hence, an interrupt service routine may examine the contents of
the stack to determine if the interrupt was caused by a BRK instruction. The
built-in interrupt service routine pushes the three user registers (.A, .X, and.Y in
that order) onto the stack, checks for a break instruction, and indirectly jumps
through the BRK instruction vector at $0316-$0317 when a BRK is executed.
Trapping a BRK instruction is accomplished most easily by altering this vector to
point to your routine.
It should be noted that the interrupt caused by a BRK instruction can NOT be
masked by setting the interrupt disable (I) flag.
Example: This example alters the BRK instruction vector. Before executing it, check the
default contents of $0316-$0317 with the M (Memory) command. The low byte
of the default address for BRK processing is located in $0316, and the high byte in
$0317. If this address is not $F44C, replace the $F44C in the program with it.
. 2000 A9 OB LDA #$0B Load the low byte of the address of
new BRK processor.
. 2002 8D 16 03 STA $0316 Store in vector.
. 2005 A9 20 LDA #$20 Load the high byte of the address of
new BRK processor.
. 2007 8D 17 03 STA $0317 Store in vector.