Commodore Plus 4 - Page 312

. 202E
. 2031
. 2033
. 2036
. 2039
. 203A
. 203B
. 203C
. 203D
. 203E
4C
A9
8D
CE
68
A8
68
AA
68
40
39
50
0B
15
20
FF
FF
JMP
LDA
STA
DEC
PLA
TAY
PLA
TAX
PLA
RTI
$2039
#$50
$FF0B
$FF15
Jump to exit.
Compare value for bottom interrupt
Store in compare value.
Decrement the screen color.
Exit. Pull .A.
Transfer to .Y.
Pull .A.
Transfer to .X.
Pull .A.
Return from interrupt.
Try changing the values used in $2010 and $2026 to change the position of the
first interrupt or the values used in $2022 and $2031 for the second interrupt. To
regain control of the computer, push the reset button (and hold down RUN/
STOP if you do not want to return to BASIC).
Timer Interrupts
The Plus/4 graphics chip is equipped with three timers that can be used to
interrupt the processor. Interrupts from the first timer are enabled by setting bit 3
of the interrupt enable register ($FF0 A) to 1. This timer has a 16-bit reload value
that is stored in two 8-bit registers. The low byte is stored in $FF00 and the high
byte in $FF01. A load from these registers reads the current value of the timer. A
store to these registers sets the reload value. In addition, a store to the low byte
($FF00) stops the counter, and a store to the high byte ($FF01) starts it. Hence,
the appropriate order for storing a new reload value is always low byte, then high
byte.
Once started, this timer counts down from the reload value to zero. Upon
reaching zero, it sets bit 3 of the interrupt status register ($FF09) to 1; if it has been
interrupt enabled, bit 7 of this register is also set to 1 and an interrupt occurs. This
timer is then reloaded with the reload value and proceeds to count down to zero,
repeating the process. For interrupts to continue to occur properly, bit 3 of the
interrupt status register ($FF09) must be cleared by storing a 1 to it, after
detecting a timer 1 interrupt.
The second and third timers are interrupt enabled by setting bits 4 and 6,
respectively, of the interrupt enable register ($FF0A) to 1. Unlike the first timer,
these timers do not have reload registers. Each has a 16-bit start value that is
stored into two 8-bit registers ($FF02-$FF03 for the second, and $FF04-$FF05
for the third). A load from these registers reads the current value of the timer. A
store to these registers sets the start value. As before, a store to a low byte ($FF02
or $FF04) stops the associated timer, and a store to a high byte ($FF03 or $FF05)
starts it. Again, the appropriate order for storing a new start value is lbw byte,
then high byte.
Once started, these timers count down from the start value to zero. Upon
reaching zero, they set bit 4 (for the second timer) or 6 (for the third timer) in the