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Datapulse 101 - Circuit Description

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3.2
CIRCUIT
DESCRIPTION
Refer
to
the
schematic
diagram
for the
following
discussions.
3
2.1
Repetition
Rate
Oscillator
The
internal
rate
oscillator
is
an
emitter
coupled
multivibrator
with
high
level
positive
feedback
for
ac
provided
by
the
timing
capacitors
C6
through
Cll.
This
circuit
supplies
a
free-running
basic
rate
that
governs
the
remaining
circuits
and
provides
system
clock
output
pulses.
In
addition,
it
has
the
capability
of
synchronously
starting
oscillations
that
begin
at
the
leading
edge
of
a
control
gate
and
continue
until
the
gate
is
removed.
The
oscillator
circuit
consists
of
transistors
Q2,
Q3,
and
Q4
and
their
related
circuit
components.
To
trace
the
cycle
of
operation,
assume
that
Q4
is
cut
off
and
Q2
is
conducting;
the
waveform
at
the
base
of
Q4
will
then
be
rising
exponentially
toward
ground.
The
emitter
of
Q4
will
be
held
near
ground
by
the
conducting
emitter
of
Q2
and
when
the
base
of
Q4
reaches
ground,
Q2
will
start
to
cut
off.
The
resulting
positive
step
at
the
collector
of
OZ
will
be
transferred
through
emitter
follower
C3
and
the
timing
capacitor
(C6
through
C11)
to
the
base
of
Q4.
QB
provides
a
low
impedance
discharge
path
for
the
timing
capacitor
through
diode
CR3
to
ground.
C4
will
regeneratively
turn
on
while
QZ
is
turned
off
but
the
circuit
will
remain
in
this
condition
for
only
a
short
time
because
of
the
low
impedance
of
CR3.
It
will
again
become
regen-
eratively
unstable
and
Q4
will
be
cut
off
when
the
timing
capacitor
discharges
through
CR3,
starting
the
cycle
over
again.
The
collector
of
Q4
provides
an
isolated
output
that
does
not
affect
the
timing
circuitry
and
is
used
to
drive
the
trigger
multivibrator
(CR50
and
08)
and
the
advance
trigger
amplifier
(Q7).
The
positive
step
at
the
collector
of
Q4,
when
it
is
cut
off
operates
the
trigger
multivibrator
and
the
negative
step,
when
Q4
again
conducts
drives
the
advance
trigger
amplifier.
The
negative
step
always
appears
somewhat
before
the turnoff
of
Q4
and
is
present
whenever
the
rate
oscillator
is
running.
3,
Z.
2
External
Gate
Amplifier
Q1
is
a
buffer
amplifier
stage
which
inverts
the
external
gate
and
provides
the
standardized
output
to
gate
the
rate
oscillator
and
the
delay
multivibrator.
The
base
to
emitter
drop
of
Q1
sets
the
gate
amplitude
requirement
and
base
resistor
R2
provides
input
impedance
as
well
as
protection
from
overdrive.
In
the
asynchronous
gating
mode,
the
output
of
()1
drives
Q9
which
is
used
to
gate the
delay
multivibrator.
The
rate
oscillator
is
not
gated.
In
synchronous
gating,
the
rate
oscillator
is
stopped
at
a
point
in
its
cycle
just
before
the
turn
off
of
Q4
would
normally
Occur
and
is
held
in
this
condition
by
the
current
through
resistor
R4
and
diode
CR1.
The
application
of
a
gate
signal
drives
the
collector
of
Ql
abruptly
negative
and
allows
Q4
to
turn
off
by
stopping
the
current
flow
in
R4
and
CR1
that
was
holding
its
base
3-4