DEC VT220 - 8.2.2 Horizontal Deflection Circuit

8.2.2 Horizontal Deflection Circuit
The horizontal deflection circuit develops the potentials supplied
to the horizontal windings of the yoke assembly. These potentials
provide for deflection of the CRT electron beam during horizontal
trace and retrace times. Horizontal retrace time is defined by a
horizontal sync signal input from the video logic (HOR IN).
The horizontal deflection circuit (Figure 8-4) consists of the
following circuits.
• Horizontal processor
• Horizontal driver
• Horizontal output
8.2.2.1 Horizontal Processor Circuit -- The horizontal processor
circuit provides the base control for defining trace and retrace
periods. It develops a square wave output that is low during the
second half of trace time, and high at all other times.
The horizontal processor circuit (Figure 8-5) consists of the
following circuits.
• Horizontal processor device (E20l)
• Horizontal sync input network (C200, R200, and R202)
• Horizontal hold network (R203, R204,C202, R205, R208,
C203, and C204)
• Horizontal centering (phase) network (R2l5, R2l1, C208,
and C207)
• Voltage divider network (R206, C206, C20S, R210, and
ZDl)
The horizontal hold network provides for adjustable control (R203)
of the base frequency of the processor (E20l). The horizontal
centering network provides for adjustable control (R2ll) of the
feedback from the horizontal output, which is compared by E20l
against the HOR IN from R200, to determine the phase difference
between the HOR IN and horizontal output circuit conditions. The
voltage divider network defines the output duty cycle of E20l (20
us, ~lus), with this duty cycle reflected as a square wave output
from E20l, pin 1, to the horizontal driver circuit (the output
from E20l, pin 1 is also sent to the pulse width modulator in the
PS as a sync signal).
8-4