Denon D-MA5DV - Page 38

D-MAS5DV/D-MX7700DV
VDAC O | Video VDAC output.
YUv7
|
©
|YUVv7pixeloutputdata,
ee
CSC“‘C*C‘*S
PCLK2XSCN
j17_
|
PcuKascn
|
0
[13.5MHzvideooutputpixelclock
—CC“‘CSCSCN#C#(“(N#N(N#(N(CNCOC*S
HSYNC#
vO
[133
[HO]
CO
135 vO
136
137 vO
141
[142
[Hwra#
|
0
[Hostwriterequest
ss
C—“‘CS™SC™C*#*#*C*C“‘CSC™CSC*sSCS~*Y
(1443, HRRQF—O«d|:«C Host read request.
Host interrupt.
[145 [HRST# | -O_[ Host reset.
146 [HIORDY ~=—s |i Host I/O ready.
[149
THWR#
|
0
[Hostwrite
COC—“=*S*~“‘S*S*S*”*S*”*S*™*:™O™C™OCOCOC*S
150
HRD#
|
©
[Hostread
OT
C“‘“CSCS*™*™*™*™*™*™*™*~*~C™C™CSY
(151s
[Hiocsi6#
«|
|__|
Device
16-bit
data
transfer.
152
[HCSiFx#
|
O
[Hostselectt.
ss
C—“‘CSC*C“‘CNSCNCNC#C#C
}153sHCs3Fx#
|
0
[Hostselect3.
sO
C—“‘C*SSNC#OC#CNC‘CNNCNCONSCNNN’NWNWNC#N”CON
fico
—sfuxi)
|
PCDATA,
Cs—“CSSNNCN#NSCO“CNNNN’NYNYNNYY
|170
Ss
[Loe#
|
0
[Device
outputenable.
C—C“‘“S*S*S*S*S*S*S*S*S*S*~CS~S~S
|
17e:173_[ucsy3:qy#
|__|
Chip select
{3:0}.
197:194,
191:185, LD[15:0] VO. | EPROM device data bus.
[198
LWRLL#
|
0
[Devicelow-bytewriteenable,
—C“‘“‘CSSC#NC“C(C(#NNN(N’N#NWN#N#N#SCO
199
[LWRHL#
|
O
[Device
high-bytewriteenable
C“‘“CNSC#C#C‘*d”
[202
[camino
|
|
[Cameavuvo.C—C—“‘“CS*s*s‘“‘“S*S™*™*™COCOCOC™C™C~*Y
203
}CAMIN,
|
1
[Cameravuvt.
CO—“s™S™S*sSOSOC‘C
fet
faux)
io
Pca
SOC~C~CSCSCSCSCSCSC“CSCSCSSCSNS
38