Denon UCD-250 - INTEGRATED CIRCUIT (IC) FUNCTIONS; IC Pin Functions Overview

ma D-250
CD PLAYER SECTION .
@ IC's SEMICONDUCTORS
HA12158
(1C501)
LRCI
DIN
BCKI
ae
SM5840CS
(1C601)
Fitter computation and
attenuation computation
RST
BCKO
cree O WCKO
MUTE 5 Dot
Q DOR
O 0G
PET OD ee ee ae Tae eet OC---
Voo Owié Ow20
@ Pin Description
Selection pin 1 for number of output bits ar eee ee eee
(NOTE) NS-ON : Noise shaper on ee eae
NS-OFF : Noise shaper off (NS-ON) (NS-ON)
(NS-ON ) (NS-ON )
; 2 | xm |i | Oscillator input pin
| 3 | xTo | o | Oscillator input pin
MN1280S (1C683) [4 | cxo | o | Oscillator output clock (Frequency is the same as XT!)
| 5 | vss | =| Ground pin
a
pc)
Selection pin 2 for number of output bits | (When OW20 is low level : 18 bits or 20 bits)
(NOTE) See the column of OW16. (When OW20 is high level : 18 bits or 16 bits)
Bie ed
a ~ --
besscrseco
@Pin function table
fin Ne| Sweet | VO[ Renato S—S~*idiRe ne | Sm [VO Cnet
fa
[oz
[1
[762
swith
29
ecw
|
1
|
Limit
switch
input
|r|
prem
|
ip
[Deen
|
(When
DEM
is
low
level
:
Deemphasis
is
off)
[2
|
iO
|
1
[TSAI
©
input
80
esw
[ot
|
Laser
switch
input
ei
aa
(When
DEM
is
high
level
:
Deemphasis
is
on)
[
3
|
mio
[Oo
[TSal
ouput
:
|
8
|
wore
|
ip
|rnesioationt
|
(When
MUTE
is
low
level
:
Soft
mute
is
off)
as
ae
ec
eel
:
aan
(When
MUTE
is
high
level
:
Soft
mute
is
on)
[5
[
ts20
fo
[TSA2 ouput
ass
|__9
|
_RST__|_ip_|
System
reset
(Initialization)
[6
[me
[tte
input
+
Gnb
30}
Go
_|
Deitch
output
[
7
|
se
[1
[ssa
©
input
[a
|
bor
|
o
[Right
channel
data
output
|
8
|
sso_|
0 |
SSA
output
|
36
|
DFIN
|
1
|
Defect
comparator
input
[12
[oto
[Left
channel
data
ouput
[3
MRE
|
0
|
Mirror
comparator
ouipat
a
BS
[10
[
FE
|
1/0
_|
Focus
error
signal
output,
FS4
input
|
38
|
DFH
|
0
|
Defect
hold
signal
output
[eT
Vp
|
=
[Supply
pin
(S
V:Standar)
ae
[39
[waar
[
0]
Brvor
hold
signal
outputs
SSS
075
SO
cr
aT
ie
[oT
|
SSA
©
inpat
ao
[erwr[
1
TERM
signal
output
SSS
et
OE
[3
[so
[0
[FsAinpue
tat
TMD
TT
APC
amplifier
input
pis
|
BCKO
[16
[inci
|
ip
[Clock
of the
input
data sample
rate(fs)
0
[a5
[POD]
0
|
Focus
up/down
voltans
oalpat_||_43
|
BYPS
|
0
|
Capacitor
connection
pin
for
ripple
Aer
ene
dee
ee
VCO
Feference
voltage
[4
[SET
_|
0
|
Reterence
current
seting
ie
oon eee
[7
[pw
|
ot
EU!
control
rolled’
JSBuE
i
ERO
Le
AO
5
RES
cutput
i:Input
pin
ip
:
Input
pin
with
pull-up
resistor
0
:
Output
pin
|
18
[
FRA
[|
Oo
|
VCO
free-run
frequency
setting
46
RFO
I
RFS
©
input
a
Tie [wee | Wee [ V60 Vee Ver | Pre-block Ver
|
20
[
veo
{|
0
|
VCO
output
|
48
|
RFI
|
1
|
RFI
(1/V
conversion
block)
input
BA15218
(1C503)
HD74HCOOP
(1C602)
VCO ground | 49 | RF2 | 1 | RF2 (I/V conversion block) input
22
[cour
[0
[Track
count
signal
outpt
[so
[VREF
[0
Reference
voltage
output
[23
[sens
[0
[F2C
and TZC
signal
output
||
S21
|
TRI
|
t|
TRI
(1/V
conversion
amplifier)
input__|
ovteut-i[T]
om
|
24
|
urst
|
1
|
Reset
signal
output
|
s2_[
Tre
[1
|
TR2
(1/V
conversion
amplifier)
input__|
7
[2s
|
prc
|
1
|
Direct
control
signal
output
|_83
Preamplifier
block
ground
INVERTING
7
Jourput-2
|
26
[|
LT
|
1
|
Data
transfer
signal
input
|
54
|
FH
|
0
|
Focus error
hold
signal
output
won
Rncli
[27 [pata [1 | Data signal input [35 | TE | 1/0 | Track error signal output, TMI input 8 4 INPUT L3 INPUT s” 7
|
28
[
ak
|
1
|
Data
sync
clock
input
[56
|
Tor
|
1
[TGiswith
:
viata’
Fe]MON
INVERTING
44
INPUT=2
N
O