Dragino LT22222-L - Specifications

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LT Series LoRa IO controller User Manual 6 / 42
1.2 Specifications
Hardware System:
 STM32L072CZT6 MCU
 SX1276/78 Wireless Chip
 Power Consumption:
 Idle: 4mA@12v
 20dB Transmit: 34mA@12v
Interface for Model: LT33222-L:
 3 x Digital Input ( Detect Low signal , Max, 6V)
 3 x Digital Output (NPN output. Max pull up voltage 36V,450mA)
 2 x Relay Output (5A@250VAC / 30VDC)
 2 x 0~20mA Analog Input (res:0.01mA)
 2 x 0~30V Analog Input (res:0.01v)
 Power Input 7~ 24V DC.

Interface for Model: LT22222-L:
 2 x Digital dual direction Input (Detect High/Low signal, Max: 50v, or 220v with
optional external resistor)
 2 x Digital Output (NPN output. Max pull up voltage 36V,450mA)
 2 x Relay Output (5A@250VAC / 30VDC)
 2 x 0~20mA Analog Input (res:0.01mA)
 2 x 0~30V Analog Input (res:0.01v)
 Power Input 7~ 24V DC.
LoRa Spec:
 Frequency Range:
 Band 1 (HF): 862 ~ 1020 Mhz
 Band 2 (LF): 410 ~ 528 Mhz
 168 dB maximum link budget.
 +20 dBm - 100 mW constant RF output vs.
 +14 dBm high efficiency PA.
 Programmable bit rate up to 300 kbps.
 High sensitivity: down to -148 dBm.
 Bullet-proof front end: IIP3 = -12.5 dBm.
 Excellent blocking immunity.
 Low RX current of 10.3 mA, 200 nA register retention.
 Fully integrated synthesizer with a resolution of 61 Hz.
 FSK, GFSK, MSK, GMSK, LoRaTM and OOK modulation.
 Built-in bit synchronizer for clock recovery.
 Preamble detection.