áROM PCI/ISA BIOS (P5VX-Be)
CHIPSET FEATURES SETUP
AWARD SOFTWARE, INC.
Auto Configuration : Enabled System BIOS Cacheable : Enabled
DRAM Timing : 60ns Video BIOS Cacheable : Enabled
Memory Hole At 15M-16M : Disabled
DRAM RAS# Precharge Time : 3 Chipset NA# Asserted : Enabled
DRAM R/W Leadoff Timing : R10/W6 Peer Concurrency : Enabled
Fast RAS To CAS Delay : 3
DRAM Read Burst <EDO/FP> : x222/x333
DRAM Write Burst Timing : x222
Fast MA to RAS# Delay CLK: 1
Fast EDO Path Select : Disabled
Refresh RAS# Assertion : 4 Clks
ESC : Quit
↑↓→←
: Select Item
ISA Bus Clock : PCICLK/4 F1 : Help PU/PD/+/- : Modify
F5 : Old Values (Shift)F2 : Color
F6 : Load BIOS Defaults
F7 : Load Setup Defaults
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The following items are controlled by when users select
“Enabled”. For this reason, their default values will be changed by the speed
of CPU. These items are :
“DRAM RAS# Precharge Time”, “ “Fast RAS to CAS Delay”, “DRAM Read
Burst <EDO/FP>“, “DRAM Write Burst Timing” “Fast MA to RAS# Delay CLK”,
“Fast EDO Path Select”, “Refresh RAS# Assertion” and “ISA Clock”.
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