For SYNC DSB operation, and in SSB mode when
ENHANCED SSB has been disabled, U10 switches off
the quadrature audio path (SSB_DSB line), leaving only
the in-phase path which contains both sidebands.
After audio switching, the audio is passed through a
5.5 kHz low pass filter U5 (pin 1 output) to form
HF_AUDIO, and CLOCK_AUDIO (for auto clock setting).
R112, R113, and C229 provide an audio voltage
reference that is used by the phase shift network, and all
other audio circuitry located on the main board.
The second section of the synchronous detector
described here provides the locally generated 455 kHz
injection signals used by the product detectors for
demodulation. For synchronous detection (SYNC LSB,
USB, or DSB), the injection is provided by a phase
locked loop (PLL) whenever there is a carrier to lock to
such as an AM signal. The PLL contains a phase
detector, a low pass filter, a DC controlled oscillator, and
a Johnson counter which provides two signals that are
90 degrees apart to feed the two product detectors.
Q46 provides preliminary limiting of the 455 kHz I.F.
signal. Final limiting is done by U8 (pin 3 out), to remove
as much modulation as possible, leaving only the carrier.
R431 sets the DC bias to the final limiter. This limited
signal is passed on to phase detector U8 (pin 6 out)
where it is compared with 455 kHz output from the
Johnson counter. The phase detector output consists of
455 kHz pulses, the width of which varies depending on
the phase relationship of the two input signals. After the
phase detector, that signal is low pass filtered so that
only the DC component remains. The low pass filter has
two bandwidths, one to acquire lock (fast), and one to
retain lock (slow). U3 (pin 3 out) selects the bandwidth.
U3 (pin 2 out) only serves to apply a specific voltage to
the low pass filter while not in use.
After filtering, the DC voltage is amplified to control
the frequency of the oscillator by means of varacap
diodes CR42 and CR43. The phase locked loop is
locked when the two signals at the input of the phase
detector are in quadrature (90
0
out of phase). The
oscillator (Q45) runs at 4 times 455 kHz (1820 kHz), and
is fed through U8 (pin 8 out) and U8 (pin 11 out) to a
Johnson counter composed of a dual D-type flip-flop U9
that divides it by 4 to produce the quadrature signals.
Q55 and Q44 select the polarity for the quadrature
product detector to select the desired sideband, as
mentioned above. Q73 provides power for the entire
synchronous detector.
In the case of a single sideband signals (SSB) with
no carrier to lock to, SSB mode is selected by the user,
and the BFO is used to supply detector injection instead
of the PLL described above. The BFO signal frequency
is determined by the PBT setting, and also feeds the
Johnson counter through U8, but only at 2 times 455
kHz (910 kHz). It is a perfectly symmetrical signal, so the
Johnson counter only needs to divide it by two to provide
the two signals, 90 degrees apart.
The BFO signal is generated by U23 which is a
Programmable Logic Direct Digital Synthesizer. It is
supplied with a 4 MHz signal from the main synthesizer
reference oscillator U25, and with serial data from the
front panel board. Its digital output passes through a
digital to analog converter network where its output is
converted to a 910 kHz BFO signal. The frequency of
this signal can vary slightly depending on the mode in
use and the sideband selected by the user. This signal
is supplied to one gate (pin 10) of exclusive OR gate
(U8). The other input of this gate (pin 9) is fed by
voltage controlled oscillator Q45 which is never active
when the BFO signal is present. The output of U8 (pin
11) is fed to the Johnson counter, where it is divided by
two and fed to the two quadrature detectors U3 (pin 11
out) and U3 (pin 8 out) which were described previously.
FM (VHF) Section
The VHF signal from the antenna switch SW2 is fed
into a tracking filter formed by CR8-11 and L31-32. This
filter is tuned to the displayed signal by setting the
voltage at V_TUNE. It is then amplified by preamp Q4,
when the preamp is selected. Q4 is turned on by Q5,
and Q504-505 control Q4's bias. When the preamp is
not selected, Q4 is biased so that the signal is passed
directly through it without being altered.
After the preamp transistor, the signal is passed
through another tracking filter formed by CR12-15, and
L33-34 whose tuning is also set by V_TUNE. Next, the
signal is buffered by Q60 mainly to provide reverse
isolation of the LO when the preamp is not on.
After buffering, the signal is mixed down to 10.7
MHz by a single balanced mixer formed by T1, T2, Q61-
62, and T3. The 10.7 MHz I.F. signal is amplified by Q6,
and bandpass filtered by CF2 before being amplified
again by Q7 and further filtered by CF1. This signal is
demodulated by U14. U14 produces multiplexed audio,
and signal strength. The signal strength amplitude is
calibrated by R420 and amplified by U18 (pin 1 out). The
resulting FM _SIGNAL_STRENGTH voltage is passed
over to U11 (pin 13) to be switched with the HF signal
strength.
The DC component of the multiplex audio from U14
is filtered off and calibrated by R421, then amplified by
U18 (pin7 out) to form the discriminator voltage (DISC-
VOLTAGE) which is used during FM scanning. The AC
component of the multiplex audio is fed to the stereo
demodulator, U15. U15 uses a PLL to lock to the pilot
carrier of a stereo signal, and R428 sets the free running
frequency of the oscillator in the loop. Q22 and Q50
defeat the oscillator, to prevent stereo operation when
mono mode is selected by the user. U15 provides left
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