Gigabyte A520M AORUS ELITE - Page 26

 Advanced Memory Settings
 Memory Subtimings
d Standard Timing Control, Advanced Timing Control, CAD Bus Setup Timing, CAD Bus
DriveStrength,DataBusConguration
These sections provide memory timing settings. Note: Your system may become unstable or fail to boot
after you make changes on the memory timings. If this occurs, please reset the board to default values by
loading optimized defaults or clearing the CMOS values.
 SPD Info
Displays information on the installed memory.
& CPU Vcore/Dynamic Vcore(DVID)/VCORE SOC/Dynamic VCORE SOC(DVID)/CPU VDD18/
CPU VDDP/A_VDD18S5/DRAM Voltage (CH A/B)/DDRVPP Voltage (CH A/B)/DRAM
Termination (CH A/B)
These items allow you to adjust the CPU Vcore and memory voltages.
 CPU/VRM Settings
 ThissubmenuallowsyoutocongureLoad-LineCalibrationlevel.
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