Gigabyte GA-890XA-UD3 - Dram Configuration

- 39 - BIOS Setup
CPU Host Clock Control
Enables or disables the control of CPU host clock. Auto (default) allows the BIOS to automatically adjust
the CPU host frequency. Manual allows the CPU Frequency (MHz) item below to be congurable.
Note: If your system fails to boot after overclocking, please wait for 20 seconds to allow for automated
system reboot, or clear the CMOS values to reset the board to default values.
CPU Frequency(MHz)
Allows you to manually set the CPU host frequency. The adjustable range is from 200 MHz to 500 MHz.
Important It is highly recommended that the CPU frequency be set in accordance with the CPU speci-
cations.
Set Memory Clock
Determines whether to manually set the memory clock. Auto lets BIOS automatically set the memory
clock as required. Manual allows the memory clock control item below to be congurable. (Default: Auto)
DRAM Conguration
CMOS Setup Utility-Copyright (C) 1984-2010 Award Software
DRAMConguration
CPU Host Clock Control [Auto]
x CPU Frequency(MHz) 200
Set Memory Clock [Auto]
x Memory Clock x6.66 1333Mhz
DCTs Mode [Unganged]
DDR3 Timing Items [Auto] SPD Auto
x CAS# latency Auto 9T 9T
x RAS to CAS R/W Delay Auto 9T 9T
x Row Precharge Time Auto 9T 9T
x Minimum RAS Active Time Auto 24T 24T
x 1T/2T Command Timing Auto -- --
x TwTr Command Delay Auto 5T 5T
x Trfc0 for DIMM1 Auto 110ns 110ns
x Trfc2 for DIMM2 Auto -- --
x Trfc1 for DIMM3 Auto -- --
x Trfc3 for DIMM4 Auto -- --
x Write Recovery Time Auto 10T 10T
x Precharge Time Auto 5T 5T
x Row Cycle Time Auto 33T 33T
higf
: Move Enter: Select +/-/PU/PD: Value F10: Save ESC: Exit F1: General Help
F5: Previous Values F6: Fail-Safe Defaults F7: Optimized Defaults
Item Help
Menu Level

CMOS Setup Utility-Copyright (C) 1984-2010 Award Software
DRAMConguration
higf
: Move Enter: Select +/-/PU/PD: Value F10: Save ESC: Exit F1: General Help
F5: Previous Values F6: Fail-Safe Defaults F7: Optimized Defaults
Item Help
Menu Level

x RAS to RAS Delay Auto 4T 4T
**
DCTs Drive Strength
**
DCT0 DCT1
ProcOdt(ohms) [Auto] 60 [Auto] 60
DQS drive Strength [Auto] 1.0x [Auto] 1.0x
Data drive Strength [Auto] 1.0x [Auto] 1.0x
MEMCLK drive Strength [Auto] 1.25x [Auto] 1.25x
Addr/Cmd drive Strength [Auto] 1.5x [Auto] 1.5x
CS/ODT drive Strength [Auto] 1.5x [Auto] 1.5x
CKE drive Strength [Auto] 1.5x [Auto] 1.5x
Bank Interleaving [Enabled]
Channel interleave [Enabled]
DQS Training Control [Skip DQS]
CKE Power Down Mode [Disabled]
Memclock tri-stating [Disabled]