Hardware Installation - 34 -
3-4-4 Processor and Memory Module Matrix Table
4 DIMM
Memory Q’ty
for each CPU
CPU1
J0
J1
I0
I1
L0
L1
K0
K1
O1 O0
P1
P0
M1
M0
N1
N0
V
1 DIMM
2 DIMM
6 DIMM
8 DIMM
12 DIMM
V
V V
VVVV
VV VV V
V
V
VV
V
V
V
VVVV
VV
V VV
V VV
16 DIMM
VV V VV VV V V VVV VV VV
V
CPU0
B0
B1
A0
A1
D0
D1
C0
C1
G1 G0
H1
H0
E1
E0
F1
F0
V
V V
VVVV
VV V V V
V
VV
V V
V VV V
V
V VV
V
V V
V
V
V
V
V VV V VV V V V VV V VV VV
V
NOTE!
l
There should be at least one DDR4 DIMM per socket.
l
If only one DIMM is populated in a channel, then populate it in the slot furthest away from CPU of that channel.
l
Channel 0's on each memory controller (A/E/C/G, I/M/K/O) must be populated with same total capacity per channel (if populated).
l
Channel 1's on each memory controller (B/F/D/H, J/N/L/P) must be populated with same total capacity per channel (if populated).