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RiscV AE350 SOC
GOWIN RiscV AE350 SOC User Manual
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Gowin RiscV_AE350_SOC Quick Start
Manual
MUG1030-1.0E, 10/31/2023
2
Table of Contents
Table of Contents
4
List of Figures
6
List of Tables
8
About this Manual
9
Purpose
9
Terminology and Abbreviation
9
Support and Feedback
10
Hardware Design
11
Hardware Target
11
Software Version
11
Reference Design
11
Related Documents
11
Design Flow
11
Detailed Design
12
Create a Project
12
IP Design
12
Figure 2-1 Riscv_Ae350_Soc IP Core
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Figure 2-2 Instruction Memory Configuration
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Figure 2-3 Data Memory Configuration
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Figure 2-4 GPIO Configuration
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User Design
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Figure 2-5 UART2 Configuration
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Figure 2-6 Riscv_Ae350_Soc IP Design
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Constraints
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Figure 2-7 PLL_ADV IP Design
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Configuration
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Figure 2-8 Synthesis Configuration
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Figure 2-9 Place & Route Configuration
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Synthesis
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Place & Route
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Figure 2-10 Synthesize
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Download
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Figure 2-11 Place & Route
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Figure 2-12 Download Configuration
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Software Design
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Software Version
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Reference Design
24
Related Documents
24
Detailed Design
24
Create a Software Project
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Figure 3-1 Create Project
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Figure 3-2 C Project
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Figure 3-3 Select Configurations
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Configure a Software Project
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Figure 3-4 Build Settings
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Figure 3-5 Select Andes C Compiler > Directories
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Figure 3-6 Select Andes C Compiler > Optimization
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Figure 3-7 Select Andes C Compiler > Debugging
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Figure 3-8 Select Andes C Compiler > Miscellaneous
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Figure 3-9 Select Ldsag Tool > General
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Figure 3-10 Select Andes C Linker > General
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Target Configuration
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Figure 3-11 Select Objcopy (Object Content Copy) > General
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Build a Software Project
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Figure 3-12 Target Configuration
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Figure 3-13 Build a New Project
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Download a Software Project
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Figure 3-14 Download Configuration
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Debug a Software Project
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Figure 3-15 Build Mode Configuration
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Figure 3-16 Create Debug Configuration
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Figure 3-17 Select Debug Configurations > Startup
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Figure 3-18 Start Debugging
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GOWIN RiscV AE350 SOC Specifications
General
Brand
GOWIN
Model
RiscV AE350 SOC
Category
Single board computers
Language
English
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General
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